(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3")
  (general
    (thickness 1.6)
    (drawings 13)
    (tracks 138)
    (zones 0)
    (modules 11)
    (nets 53)
  )
  (page A4)
  (title_block
    (title OpenKicksticker)
    (date 2020-02-05)
    (rev 1.2002)
    (comment 4 "Latching Quad Kickstart Switcher (A500+)")
  )
  (layers
    (0 F.Cu signal hide)
    (31 B.Cu signal hide)
    (32 B.Adhes user hide)
    (33 F.Adhes user hide)
    (34 B.Paste user hide)
    (35 F.Paste user)
    (36 B.SilkS user hide)
    (37 F.SilkS user)
    (38 B.Mask user hide)
    (39 F.Mask user)
    (40 Dwgs.User user hide)
    (41 Cmts.User user hide)
    (42 Eco1.User user hide)
    (43 Eco2.User user hide)
    (44 Edge.Cuts user)
    (45 Margin user hide)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user hide)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.127)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.0508)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 "Net-(C1-Pad2)")
  (net 3 "Net-(C2-Pad1)")
  (net 4 "Net-(R2-Pad1)")
  (net 5 "Net-(R3-Pad1)")
  (net 6 /a17)
  (net 7 /a7)
  (net 8 /d4)
  (net 9 /a6)
  (net 10 /d12)
  (net 11 /a5)
  (net 12 /d5)
  (net 13 /a4)
  (net 14 /d13)
  (net 15 /a3)
  (net 16 /d6)
  (net 17 /a2)
  (net 18 /d14)
  (net 19 /a1)
  (net 20 /d7)
  (net 21 /a0)
  (net 22 /d15)
  (net 23 /~ce)
  (net 24 /vpp)
  (net 25 /~oe)
  (net 26 /a16)
  (net 27 /d0)
  (net 28 /a15)
  (net 29 /d8)
  (net 30 /a14)
  (net 31 /d1)
  (net 32 /a13)
  (net 33 /d9)
  (net 34 /a12)
  (net 35 /d2)
  (net 36 /a11)
  (net 37 /d10)
  (net 38 /a10)
  (net 39 /d3)
  (net 40 /a9)
  (net 41 /d11)
  (net 42 /a8)
  (net 43 "Net-(ROM_U1-Pad1)")
  (net 44 "Net-(ROM_U1-Pad42)")
  (net 45 "Net-(ROM_U2-Pad11)")
  (net 46 "Net-(ROM_U2-Pad2)")
  (net 47 "Net-(ROM_U2-Pad12)")
  (net 48 "Net-(ROM_U2-Pad5)")
  (net 49 "Net-(ROM_U2-Pad15)")
  (net 50 "Net-(ROM_U2-Pad6)")
  (net 51 "Net-(ROM_U2-Pad9)")
  (net 52 "Net-(ROM_A1-Pad11)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /a0)
    (add_net /a1)
    (add_net /a10)
    (add_net /a11)
    (add_net /a12)
    (add_net /a13)
    (add_net /a14)
    (add_net /a15)
    (add_net /a16)
    (add_net /a17)
    (add_net /a2)
    (add_net /a3)
    (add_net /a4)
    (add_net /a5)
    (add_net /a6)
    (add_net /a7)
    (add_net /a8)
    (add_net /a9)
    (add_net /d0)
    (add_net /d1)
    (add_net /d10)
    (add_net /d11)
    (add_net /d12)
    (add_net /d13)
    (add_net /d14)
    (add_net /d15)
    (add_net /d2)
    (add_net /d3)
    (add_net /d4)
    (add_net /d5)
    (add_net /d6)
    (add_net /d7)
    (add_net /d8)
    (add_net /d9)
    (add_net /vpp)
    (add_net /~ce)
    (add_net /~oe)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C1-Pad2)")
    (add_net "Net-(C2-Pad1)")
    (add_net "Net-(R2-Pad1)")
    (add_net "Net-(R3-Pad1)")
    (add_net "Net-(ROM_A1-Pad11)")
    (add_net "Net-(ROM_U1-Pad1)")
    (add_net "Net-(ROM_U1-Pad42)")
    (add_net "Net-(ROM_U2-Pad11)")
    (add_net "Net-(ROM_U2-Pad12)")
    (add_net "Net-(ROM_U2-Pad15)")
    (add_net "Net-(ROM_U2-Pad2)")
    (add_net "Net-(ROM_U2-Pad5)")
    (add_net "Net-(ROM_U2-Pad6)")
    (add_net "Net-(ROM_U2-Pad9)")
  )
  (module Package_DIP:DIP-40_W15.24mm_LongPads (layer F.Cu) (tedit 5E3BBF20)
    (at 127 69.215)
    (descr "40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads")
    (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads")
    (fp_text reference ROM_A1 (at 7.62 22.86 90) (layer B.SilkS))
    (fp_text value 27C400_Amiga_Driver (at 8.89 22.86 90) (layer B.Fab))
    (fp_text user %R (at 5.715 22.86 90) (layer B.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 /a17))
    (pad 21 thru_hole oval (at 15.24 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 7 /a7))
    (pad 22 thru_hole oval (at 15.24 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 8 /d4))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 9 /a6))
    (pad 23 thru_hole oval (at 15.24 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 10 /d12))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 11 /a5))
    (pad 24 thru_hole oval (at 15.24 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 12 /d5))
    (pad 5 thru_hole oval (at 0 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 13 /a4))
    (pad 25 thru_hole oval (at 15.24 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 14 /d13))
    (pad 6 thru_hole oval (at 0 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 15 /a3))
    (pad 26 thru_hole oval (at 15.24 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 16 /d6))
    (pad 7 thru_hole oval (at 0 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 17 /a2))
    (pad 27 thru_hole oval (at 15.24 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 18 /d14))
    (pad 8 thru_hole oval (at 0 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 19 /a1))
    (pad 28 thru_hole oval (at 15.24 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 20 /d7))
    (pad 9 thru_hole oval (at 0 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 21 /a0))
    (pad 29 thru_hole oval (at 15.24 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 22 /d15))
    (pad 10 thru_hole oval (at 0 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 23 /~ce))
    (pad 30 thru_hole oval (at 15.24 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 11 thru_hole oval (at 0 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 52 "Net-(ROM_A1-Pad11)"))
    (pad 31 thru_hole oval (at 15.24 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 24 /vpp))
    (pad 12 thru_hole oval (at 0 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 25 /~oe))
    (pad 32 thru_hole oval (at 15.24 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 26 /a16))
    (pad 13 thru_hole oval (at 0 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 27 /d0))
    (pad 33 thru_hole oval (at 15.24 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 28 /a15))
    (pad 14 thru_hole oval (at 0 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 29 /d8))
    (pad 34 thru_hole oval (at 15.24 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 30 /a14))
    (pad 15 thru_hole oval (at 0 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 31 /d1))
    (pad 35 thru_hole oval (at 15.24 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 32 /a13))
    (pad 16 thru_hole oval (at 0 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 33 /d9))
    (pad 36 thru_hole oval (at 15.24 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 34 /a12))
    (pad 17 thru_hole oval (at 0 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 35 /d2))
    (pad 37 thru_hole oval (at 15.24 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 36 /a11))
    (pad 18 thru_hole oval (at 0 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 37 /d10))
    (pad 38 thru_hole oval (at 15.24 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 38 /a10))
    (pad 19 thru_hole oval (at 0 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 39 /d3))
    (pad 39 thru_hole oval (at 15.24 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 40 /a9))
    (pad 20 thru_hole oval (at 0 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 41 /d11))
    (pad 40 thru_hole oval (at 15.24 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 42 /a8))
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x01_P2.54mm_Horizontal (layer F.Cu) (tedit 5E3BBCC5)
    (at 140.97 62.865 90)
    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
    (fp_text reference ~KBRESET (at -1.905 0.635 180) (layer F.SilkS))
    (fp_text value Conn_01x01_Male (at 5.08 2.54 90) (layer F.Fab) hide)
    (fp_text user ~KB (at 0 0) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 45 "Net-(ROM_U2-Pad11)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x01_P2.54mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Horizontal (layer F.Cu) (tedit 5E3BBBF8)
    (at 135.89 62.865 90)
    (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row")
    (tags "Through hole angled pin header THT 1x02 2.54mm single row")
    (fp_text reference JP0 (at -1.905 -0.635) (layer F.SilkS))
    (fp_text value JP0 (at 0 1.27 180) (layer F.Fab))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(R3-Pad1)"))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Horizontal (layer F.Cu) (tedit 5E3BBB95)
    (at 130.81 62.865 90)
    (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row")
    (tags "Through hole angled pin header THT 1x02 2.54mm single row")
    (fp_text reference JP1 (at -1.905 -0.635 180) (layer F.SilkS))
    (fp_text value JP1 (at 0 1.27 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(R2-Pad1)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5E3BBB00)
    (at 149.86 117.475)
    (descr "Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm")
    (fp_text reference R1 (at 1.905 -1.905) (layer F.SilkS))
    (fp_text value 1k (at 7.62 0) (layer F.Fab))
    (fp_text user %R (at 1.905 -0.635) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5E3BBAE3)
    (at 137.16 70.485 270)
    (descr "Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm")
    (fp_text reference R2 (at 17.78 0 90) (layer F.SilkS))
    (fp_text value 4k7 (at 7.62 0 90) (layer F.Fab))
    (fp_text user %R (at 1.905 -0.635 90) (layer F.Fab))
    (pad 2 thru_hole oval (at 15.24 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(R2-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5E3BBAD4)
    (at 137.16 113.665 90)
    (descr "Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm")
    (fp_text reference R3 (at -2.54 0 90) (layer F.SilkS))
    (fp_text value 4k7 (at 7.62 0 90) (layer F.Fab))
    (fp_text user %R (at 1.905 -0.635 90) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(R3-Pad1)"))
    (pad 2 thru_hole oval (at 15.24 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_THT:C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal (layer F.Cu) (tedit 5E3BBAB9)
    (at 165.1 99.695 90)
    (descr "C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf")
    (tags "C Axial series Axial Horizontal pin pitch 10mm  length 3.8mm diameter 2.6mm")
    (fp_text reference C1 (at 1.905 -1.905 90) (layer F.SilkS))
    (fp_text value 10pF (at 5.08 0 90) (layer F.Fab))
    (fp_text user %R (at 1.905 -0.635 90) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole oval (at 10 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_THT:C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal (layer F.Cu) (tedit 5E3BBA97)
    (at 165.1 112.395 90)
    (descr "C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf")
    (tags "C Axial series Axial Horizontal pin pitch 10mm  length 3.8mm diameter 2.6mm")
    (fp_text reference C2 (at 1.905 -1.905 270) (layer F.SilkS))
    (fp_text value 0.1uF (at 5.08 0 270) (layer F.Fab))
    (fp_text user %R (at 1.905 -0.635 270) (layer F.Fab))
    (pad 2 thru_hole oval (at 10 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5E3BB9C6)
    (at 161.29 112.395 180)
    (descr "20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)")
    (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil")
    (fp_text reference ROM_U2 (at 9.525 1.905 90) (layer F.SilkS))
    (fp_text value 74AHC273 (at 5.08 11.43 270) (layer F.Fab))
    (fp_text user %R (at 2.54 11.43 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 11 thru_hole oval (at 7.62 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 45 "Net-(ROM_U2-Pad11)"))
    (pad 2 thru_hole oval (at 0 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 46 "Net-(ROM_U2-Pad2)"))
    (pad 12 thru_hole oval (at 7.62 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 47 "Net-(ROM_U2-Pad12)"))
    (pad 3 thru_hole oval (at 0 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 13 thru_hole oval (at 7.62 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 4 thru_hole oval (at 0 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 14 thru_hole oval (at 7.62 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 5 thru_hole oval (at 0 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 48 "Net-(ROM_U2-Pad5)"))
    (pad 15 thru_hole oval (at 7.62 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 49 "Net-(ROM_U2-Pad15)"))
    (pad 6 thru_hole oval (at 0 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 50 "Net-(ROM_U2-Pad6)"))
    (pad 16 thru_hole oval (at 7.62 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 43 "Net-(ROM_U1-Pad1)"))
    (pad 7 thru_hole oval (at 0 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 17 thru_hole oval (at 7.62 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(R3-Pad1)"))
    (pad 8 thru_hole oval (at 0 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 18 thru_hole oval (at 7.62 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(R2-Pad1)"))
    (pad 9 thru_hole oval (at 0 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 51 "Net-(ROM_U2-Pad9)"))
    (pad 19 thru_hole oval (at 7.62 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 44 "Net-(ROM_U1-Pad42)"))
    (pad 10 thru_hole oval (at 0 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 20 thru_hole oval (at 7.62 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-20_W7.62mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DIP:DIP-42_W15.24mm_Socket_LongPads (layer F.Cu) (tedit 5E3BB90E)
    (at 130.81 66.675)
    (descr "42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads")
    (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads")
    (fp_text reference ROM_U1 (at 17.78 43.815 270) (layer F.SilkS))
    (fp_text value "M27C160 SOCKET" (at 6.35 25.4 90) (layer F.Fab))
    (fp_text user %R (at 8.89 25.4 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 43 "Net-(ROM_U1-Pad1)"))
    (pad 22 thru_hole oval (at 15.24 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 /a17))
    (pad 23 thru_hole oval (at 15.24 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 8 /d4))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 7 /a7))
    (pad 24 thru_hole oval (at 15.24 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 10 /d12))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 9 /a6))
    (pad 25 thru_hole oval (at 15.24 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 12 /d5))
    (pad 5 thru_hole oval (at 0 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 11 /a5))
    (pad 26 thru_hole oval (at 15.24 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 14 /d13))
    (pad 6 thru_hole oval (at 0 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 13 /a4))
    (pad 27 thru_hole oval (at 15.24 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 16 /d6))
    (pad 7 thru_hole oval (at 0 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 15 /a3))
    (pad 28 thru_hole oval (at 15.24 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 18 /d14))
    (pad 8 thru_hole oval (at 0 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 17 /a2))
    (pad 29 thru_hole oval (at 15.24 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 20 /d7))
    (pad 9 thru_hole oval (at 0 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 19 /a1))
    (pad 30 thru_hole oval (at 15.24 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 22 /d15))
    (pad 10 thru_hole oval (at 0 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 21 /a0))
    (pad 31 thru_hole oval (at 15.24 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 11 thru_hole oval (at 0 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 23 /~ce))
    (pad 32 thru_hole oval (at 15.24 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 24 /vpp))
    (pad 12 thru_hole oval (at 0 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 52 "Net-(ROM_A1-Pad11)"))
    (pad 33 thru_hole oval (at 15.24 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 26 /a16))
    (pad 13 thru_hole oval (at 0 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 25 /~oe))
    (pad 34 thru_hole oval (at 15.24 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 28 /a15))
    (pad 14 thru_hole oval (at 0 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 27 /d0))
    (pad 35 thru_hole oval (at 15.24 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 30 /a14))
    (pad 15 thru_hole oval (at 0 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 29 /d8))
    (pad 36 thru_hole oval (at 15.24 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 32 /a13))
    (pad 16 thru_hole oval (at 0 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 31 /d1))
    (pad 37 thru_hole oval (at 15.24 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 34 /a12))
    (pad 17 thru_hole oval (at 0 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 33 /d9))
    (pad 38 thru_hole oval (at 15.24 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 36 /a11))
    (pad 18 thru_hole oval (at 0 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 35 /d2))
    (pad 39 thru_hole oval (at 15.24 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 38 /a10))
    (pad 19 thru_hole oval (at 0 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 37 /d10))
    (pad 40 thru_hole oval (at 15.24 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 40 /a9))
    (pad 20 thru_hole oval (at 0 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 39 /d3))
    (pad 41 thru_hole oval (at 15.24 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 42 /a8))
    (pad 21 thru_hole oval (at 0 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 41 /d11))
    (pad 42 thru_hole oval (at 15.24 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 44 "Net-(ROM_U1-Pad42)"))
  )
  (gr_text "JP0=A18\nJP1=A19\n" (at 125.095 63.5) (layer F.SilkS))
  (gr_text "OpenKicksticker \"Lazy Porter\" Rev 1.2002\n" (at 148.59 81.915 90) (layer F.SilkS))
  (gr_line (start 167.005 119.38) (end 166.37 120.015) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 124.46 119.38) (end 125.095 120.015) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 166.37 86.995) (end 167.005 87.63) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 150.495 60.96) (end 151.13 61.595) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 125.095 60.96) (end 124.46 61.595) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 151.13 61.595) (end 151.13 86.995) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 125.095 60.96) (end 150.495 60.96) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 124.46 119.38) (end 124.46 61.595) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 166.37 120.015) (end 125.095 120.015) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 167.005 87.63) (end 167.005 119.38) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 151.13 86.995) (end 166.37 86.995) (layer Edge.Cuts) (width 0.1))
)
