(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
  (general
    (links 10)
    (no_connects 0)
    (area 38.835581 21.7602 68.7438 39.339801)
    (thickness 1.6)
    (drawings 21)
    (tracks 18)
    (zones 0)
    (modules 6)
    (nets 7)
  )
  (page USLetter portrait)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.254)
    (user_trace_width 0.2032)
    (user_trace_width 0.254)
    (user_trace_width 0.381)
    (user_trace_width 0.4318)
    (user_trace_width 0.508)
    (user_trace_width 0.6096)
    (user_trace_width 0.8128)
    (user_trace_width 1.27)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2032)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6604)
    (via_drill 0.4064)
    (via_min_size 0.381)
    (via_min_drill 0.3302)
    (user_via 0.5842 0.3302)
    (user_via 0.8128 0.508)
    (user_via 1.2192 0.8128)
    (user_via 1.27 1.016)
    (user_via 6.604 1.524)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 2.032 1.7272)
    (pad_drill 1.016)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(D1-Pad2)")
  (net 2 "Net-(D1-Pad1)")
  (net 3 "Net-(D3-Pad2)")
  (net 4 "Net-(D3-Pad1)")
  (net 5 "Net-(J1-Pad2)")
  (net 6 "Net-(J1-Pad3)")
  (net_class Default "Esta es la clase de red por defecto."
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6604)
    (via_drill 0.4064)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net "Net-(D1-Pad1)")
    (add_net "Net-(D1-Pad2)")
    (add_net "Net-(D3-Pad1)")
    (add_net "Net-(D3-Pad2)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
  )
  (net_class Power ""
    (clearance 0.3048)
    (trace_width 0.3048)
    (via_dia 0.762)
    (via_drill 0.508)
    (uvia_dia 1.016)
    (uvia_drill 0.254)
  )
  (module Diodes_SMD:DO-214AB (layer F.Cu) (tedit 55429DAE)
    (at 50.546 27.94 180)
    (descr "Jedec DO-214AB diode package. Designed according to Fairchild SS32 datasheet.")
    (tags "DO-214AB diode")
    (attr smd)
    (fp_text reference D1 (at 0 2.286 180) (layer F.SilkS))
    (fp_text value S3G (at 0 2.286 180) (layer F.Fab))
    (pad 2 smd rect (at 3.6 0 180) (size 2.6 3.2) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(D1-Pad2)"))
    (pad 1 smd rect (at -3.6 0 180) (size 2.6 3.2) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(D1-Pad1)"))
    (model Diodes_SMD.3dshapes/DO-214AB.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.39 0.39 0.39))
      (rotate (xyz 0 0 180))
    )
  )
  (module Diodes_SMD:DO-214AB (layer B.Cu) (tedit 55429DAE)
    (at 58.42 27.94)
    (descr "Jedec DO-214AB diode package. Designed according to Fairchild SS32 datasheet.")
    (tags "DO-214AB diode")
    (attr smd)
    (fp_text reference D2 (at 0 2.032) (layer B.SilkS))
    (fp_text value S3G (at 0 -2.54) (layer B.Fab))
    (pad 2 smd rect (at 3.6 0) (size 2.6 3.2) (layers B.Cu B.Paste B.Mask)
      (net 2 "Net-(D1-Pad1)"))
    (pad 1 smd rect (at -3.6 0) (size 2.6 3.2) (layers B.Cu B.Paste B.Mask)
      (net 1 "Net-(D1-Pad2)"))
    (model Diodes_SMD.3dshapes/DO-214AB.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.39 0.39 0.39))
      (rotate (xyz 0 0 180))
    )
  )
  (module Diodes_SMD:DO-214AB (layer B.Cu) (tedit 55429DAE)
    (at 58.42 35.56)
    (descr "Jedec DO-214AB diode package. Designed according to Fairchild SS32 datasheet.")
    (tags "DO-214AB diode")
    (attr smd)
    (fp_text reference D3 (at 0 2.286) (layer B.SilkS))
    (fp_text value S3G (at 0 -2.286) (layer B.Fab))
    (pad 2 smd rect (at 3.6 0) (size 2.6 3.2) (layers B.Cu B.Paste B.Mask)
      (net 3 "Net-(D3-Pad2)"))
    (pad 1 smd rect (at -3.6 0) (size 2.6 3.2) (layers B.Cu B.Paste B.Mask)
      (net 4 "Net-(D3-Pad1)"))
    (model Diodes_SMD.3dshapes/DO-214AB.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.39 0.39 0.39))
      (rotate (xyz 0 0 180))
    )
  )
  (module Diodes_SMD:DO-214AB (layer F.Cu) (tedit 55429DAE)
    (at 50.546 35.56 180)
    (descr "Jedec DO-214AB diode package. Designed according to Fairchild SS32 datasheet.")
    (tags "DO-214AB diode")
    (attr smd)
    (fp_text reference D4 (at 0 -2.032 180) (layer F.SilkS))
    (fp_text value S3G (at -0.254 2.54 180) (layer F.Fab))
    (pad 2 smd rect (at 3.6 0 180) (size 2.6 3.2) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(D3-Pad1)"))
    (pad 1 smd rect (at -3.6 0 180) (size 2.6 3.2) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(D3-Pad2)"))
    (model Diodes_SMD.3dshapes/DO-214AB.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.39 0.39 0.39))
      (rotate (xyz 0 0 180))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59A8B902)
    (at 43.688 27.94)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference J2 (at 0.254 -2.286) (layer F.SilkS))
    (fp_text value Conn_01x04 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole oval (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 "Net-(D1-Pad2)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 "Net-(D3-Pad1)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
      (at (xyz 0 -0.15 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59A8BAA8)
    (at 65.024 27.94)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference J1 (at 0 -5.1) (layer F.SilkS))
    (fp_text value Conn_01x04 (at 2.54 4.064 90) (layer F.Fab) hide)
    (pad 1 thru_hole oval (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 "Net-(D1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 "Net-(D3-Pad2)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
      (at (xyz 0 -0.15 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (gr_line (start 41.91 39.116) (end 41.91 30.48) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 66.548 39.116) (end 41.91 39.116) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 66.548 24.384) (end 66.548 39.116) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 41.91 24.384) (end 66.548 24.384) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 41.91 30.48) (end 41.91 24.384) (layer Edge.Cuts) (width 0.15))
  (zone (net 0) (net_name "") (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.508)
    (fill yes (arc_segments 16) (thermal_gap 0.762) (thermal_bridge_width 0.762))
    (polygon
      (pts
        (xy 41.91 24.384) (xy 66.548 24.384) (xy 66.548 39.116) (xy 41.91 39.116)
      )
    )
  )
  (zone (net 0) (net_name "") (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.508)
    (fill yes (arc_segments 16) (thermal_gap 0.762) (thermal_bridge_width 0.762))
    (polygon
      (pts
        (xy 41.91 24.384) (xy 66.548 24.384) (xy 66.548 39.116) (xy 41.91 39.116)
      )
    )
  )
)
