RPUBUS.ORG
15321^3
AVR ICSP TARGET
nRST
MISO
SCK
TARGET VCC
MOSI
0V
0V
nCTS
BOOTLOAD TARGET
TARGET VCC
TX
RX
nRTS
SHUTDOWN
SW
BOOTLOAD
ICSP
ISP TARGET
HAS PWR
nRESET
MISO
ACTIVE
MOSI
ACTIVE
nRTS
ACTIVE
an R-Pi
uploader
for AVR
ICSP
RPUBUS.ORG
<pre>Logic
USE AT YOUR OWN RISK...
This was form cadsoft libraian, but much of it is not valid, I have only
looked at parts I'm using so far...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>14POS SMALL OUTLINE (14SO[IC])
pitch 1.27
pad .6mm X1.8mm
body-Center to pad-Center 2.7mm
referance TI's SOIC package, but pads are little larger and rounded
>NAME
<pre> MULTILAYER CERAMIC CHIP CAPACITORS
Type: C1005 [EIA CC0402], C1608 [EIA CC0603], C2012 [EIA CC0805],
C3216 [EIA CC1206], C3225 [EIA CC1210], C4532 [EIA CC1812], C5750 [EIA CC2220]
CH 0±60 ppm/°C -25 to +85°C
C0G 0±30 ppm/°C -55 to +125°C
JB ±10% -25 to +85°C
X5R ±15% -55 to +85°C
X6S ±22% -55 to +105°C
X7R ±15% -55 to +125°C
X7S ±22% -55 to +125°C
X7T +22/-33% -55 to +125°C
TDK voltage cods
0G 4V
0J 6.3V
1A 10V
1C 16V
1E 25V
1V 35V
1H 50V
2A 100V
2E 250V
2V 350V
2W 450V
2J 630V
NOTE: rounded pads... http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/2209BDBA03843BBF85256BCD004EBC11/$file/f2100e.pdf
See section on Tombstoneing. Lead free solder may not wet edges, and IPC does not allow exposed copper.
My (rsutherland@epccs) experience suggest highly rounded pads reduce solder beads that can be extruded along edges of larger capacitors (0805).
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>EIA 0603 (Metric Code Size 1608) Ceramic Chip Capacitor
rounded pads are added in IPC 782 rev A, this pad was on Arduino Due and may have originated from Sparkfun.
http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/2209BDBA03843BBF85256BCD004EBC11/$file/f2100e.pdf
>NAME
>VALUE
<pre>CHIP RESISTOR
NOTE: rounded pads... http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/2209BDBA03843BBF85256BCD004EBC11/$file/f2100e.pdf
See section on Tombstoneing. Lead free solder may not wet edges, and IPC does not allow exposed copper.
My (rsutherland@epccs) experience suggest highly rounded pads reduce solder beads that can be extruded along edges of larger capacitors (0805).
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>EIA 0805 (Metric Code Size 2012) Ceramic Chip
rounded pads are added in IPC 782 rev A
http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/2209BDBA03843BBF85256BCD004EBC11/$file/f2100e.pdf
>NAME
>VALUE
<pre>MCU's 8bit AVR
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>Place at edge of board, used to solder a connector on side of board e.g.
PPPC032LFBN [SULLINS,PPPC032LFBN-RC] CONN HEADER FEMALE 3X2POS ,1IN
>NAME
Generated from <b>TMC2660-test-with-grbl.brd</b><p>
by exp-project-lbr.ulp
<pre>Raspberry Pi board model Zero,
full outline with position of big connectors & 2.75mm drill holes
1
uSD
HDMI
USB
PWR
CAMERA
BROADCOM
BCM2835 /W
512KB LPDDR2
<pre>Switch Tactile/Snap-acting
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>C&K KSA Sealed Tack Switch
KSA0M311 [C&K,KSA0M311LFT] SWITCH TACTILE SEALED SPST-NO 50MA 32V
>NAME
<pre>Tantalum Electrolytic Capacitors
EIA Code Case Code L W H W1 A
Tolerance ±0.2 +0.2/–0.1 +0.2/–0.1 +0.2 +0.3/–0.2
3216-10 I, K 3.2 1.6 1.0 (max) 1.2 0.8
3216-12 S 3.2 1.6 1.2 (max) 1.2 0.8
3216-18 A 3.2 1.6 1.6 1.2 0.8
3528-12 T 3.5 2.8 1.2 (max) 2.2 0.8
3528-15 M, H 3.5 2.8 1.5 (max) 2.2 0.8
3528-21 B 3.5 2.8 1.9 2.2 0.8
6032-15 U, W 6.0 3.2 1.5 (max) 2.2 1.3
6032-28 C 6.0 3.2 2.6 2.2 1.3
7343-20 V, Y 7.3 4.3 2.0 (max) 2.4 1.3
7343-31 D 7.3 4.3 2.9 2.4 1.3
7343-43 X, E 7.3 4.3 4.1 2.4 1.3
Metric [inch]
2013 [0805]
3216 [1206]
3528 [1411]
6032 [2413]
7343 [2917]
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>3.2mm x 1.6mm
Surface mount dimensions (EIA standard package sizes)
EIA Code Case Code L W H W1 A
Tolerance ±0.2 +0.2/–0.1 +0.2/–0.1 +0.2 +0.3/–0.2
3216-10 I, K 3.2 1.6 1.0 (max) 1.2 0.8
3216-12 S, P 3.2 1.6 1.2 (max) 1.2 0.8
3216-18 A 3.2 1.6 1.6 1.2 0.8
Note 3.2mm x 1.6mm is about 1206 (or .012 x .006 in)
>NAME
>VALUE
<pre>POWER SUPPLIE DC 2 DC
some units are for schmatics only
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>OKI-78SR Horizontal Mount
OKI-78SR-5/1.5-W36H-C
Murata Power Solutions
Ultra wide 7 to 36 VDC input range
this pinout is odd so check it
>NAME
<pre>HEADER 2.54MM center to center
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>FEMALE HEADER 8POS
>NAME
<pre>PNP Bipolar junction transistor
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>SOT23 (based on SOT23-6) pin 1 is alone (Cathode)
http://www.diodes.com/_files/zetex_files/pack/SOT23-6.pdf
center(1) to center(2,3) 2.2 mm
center(2) to center(3) 1.9mm
pad .65X x 1.06Y mm
>NAME
>VALUE
<pre>Light-emitting diode
http://en.wikipedia.org/wiki/Light-emitting_diode
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<B>LED</B><p>
5 mm, round
>NAME
<pre>NPN Bipolar junction transistor
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Released under the Creative Commons
Attribution Share-Alike 3.0 License
http://creativecommons.org/licenses/by-sa/3.0
<pre>SOT23 (based on SOT23-6) pin 1 is alone (Cathode)
http://www.diodes.com/_files/zetex_files/pack/SOT23-6.pdf
center(1) to center(2,3) 2.2 mm
center(2) to center(3) 1.9mm
pad .65X x 1.06Y mm
>NAME
>VALUE
<pre>Fiducianl Mark
USE AT YOUR OWN RISK...
Copyright (C) 2013 Ronald Steven Sutherland
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.2 or
any later version published by the Free Software Foundation; with no
Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A
copy of the license is included in the section entitled "GNU Free
Documentation License".
<pre>Fiducian R=1.27mm
STOP=2.54mm
It is up to designer to not put traces under Fiducial (i.e. Void or sold plane only)
Autorouter restricted areas are defined as RECTangles, POLYGONs, or CIRCLEs on the
tRestrict, bRestrict, or vRestrict layers.
<b>EAGLE Design Rules</b>
<p>
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.
<b>EAGLE Design Rules</b>
<p>
The default Design Rules have been set to cover
a wide range of applications. Your particular design
may have different requirements, so please make the
necessary adjustments and save your customized
design rules under a new name.
Since Version 6.2.2 text objects can contain more than one line,
which will not be processed correctly with this version.