Altium

Design Rule Verification Report

Date: 12/18/2018
Time: 10:02:40 AM
Elapsed Time: 00:00:00
Filename: C:\Users\Public\Documents\Altium\Projects\NS18248 PXIe 6341\Project Logs for NS18248 PXI 6341\NS18248 PXI 6341.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=10mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=13mil) (Max=30mil) (Preferred=15mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Hole Size Constraint (Min=1mil) (Max=400mil) (All) 0
Pads and Vias to follow the Drill pairs settings 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Room I2 (Bounding Region = (3225mil, 1281.102mil, 3990mil, 1781.102mil) (InComponentClass('I2')) 0
Room NS18248 PXI 6341 (Bounding Region = (1685mil, 1430mil, 5180mil, 4220mil) (InComponentClass('NS18248 PXI 6341')) 0
Room I1 (Bounding Region = (2425mil, 1281.102mil, 3190mil, 1781.102mil) (InComponentClass('I1')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 0