(kicad_pcb (version 4) (host pcbnew 4.0.2-stable)
  (general
    (links 11)
    (no_connects 0)
    (area 154.356999 109.398999 169.239001 129.361001)
    (thickness 1.6)
    (drawings 11)
    (tracks 13)
    (zones 0)
    (modules 4)
    (nets 15)
  )
  (page A4)
  (title_block
    (title "ELEC-0134 A4988 adapter board")
    (date 2010-03-04)
    (rev 1)
    (company "Marginally Clever Robots, Ltd.")
    (comment 1 "Dan Royer (dan@marginallyclever.com)")
    (comment 2 "Sir Ramps A Lot DARK KNIGHT edition")
  )
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.7 1.7)
    (pad_drill 1)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(U1-Pad2)")
  (net 2 GND)
  (net 3 "Net-(Q1-Pad2)")
  (net 4 "Net-(Q1-Pad3)")
  (net 5 "Net-(Q2-Pad2)")
  (net 6 "Net-(Q2-Pad3)")
  (net 7 "Net-(U1-Pad8)")
  (net 8 "Net-(Q3-Pad2)")
  (net 9 "Net-(U1-Pad10)")
  (net 10 "Net-(U1-Pad11)")
  (net 11 "Net-(U1-Pad12)")
  (net 12 "Net-(U1-Pad13)")
  (net 13 "Net-(U1-Pad14)")
  (net 14 "Net-(Q3-Pad3)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net "Net-(Q1-Pad2)")
    (add_net "Net-(Q1-Pad3)")
    (add_net "Net-(Q2-Pad2)")
    (add_net "Net-(Q2-Pad3)")
    (add_net "Net-(Q3-Pad2)")
    (add_net "Net-(Q3-Pad3)")
    (add_net "Net-(U1-Pad10)")
    (add_net "Net-(U1-Pad11)")
    (add_net "Net-(U1-Pad12)")
    (add_net "Net-(U1-Pad13)")
    (add_net "Net-(U1-Pad14)")
    (add_net "Net-(U1-Pad2)")
    (add_net "Net-(U1-Pad8)")
  )
  (module a4988:a4988 (layer F.Cu) (tedit 58BDB267)
    (at 161.798 119.38 180)
    (fp_text reference U1 (at 0 11.93 180) (layer F.SilkS))
    (fp_text value A4988 (at -2.286 8.636 180) (layer F.Fab))
    (pad 1 thru_hole circle (at -6.35 -8.89 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 2 GND))
    (pad 2 thru_hole circle (at -6.35 -6.35 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 1 "Net-(U1-Pad2)"))
    (pad 3 thru_hole circle (at -6.35 -3.81 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 1 "Net-(U1-Pad2)"))
    (pad 4 thru_hole circle (at -6.35 -1.27 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 4 "Net-(Q1-Pad3)"))
    (pad 5 thru_hole circle (at -6.35 1.27 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 6 "Net-(Q2-Pad3)"))
    (pad 6 thru_hole circle (at -6.35 3.81 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 14 "Net-(Q3-Pad3)"))
    (pad 7 thru_hole circle (at -6.35 6.35 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 2 GND))
    (pad 8 thru_hole circle (at -6.35 8.89 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(U1-Pad8)"))
    (pad 9 thru_hole circle (at 6.35 8.89 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(Q3-Pad2)"))
    (pad 10 thru_hole circle (at 6.35 6.35 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 9 "Net-(U1-Pad10)"))
    (pad 11 thru_hole circle (at 6.35 3.81 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 10 "Net-(U1-Pad11)"))
    (pad 12 thru_hole circle (at 6.35 1.27 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 11 "Net-(U1-Pad12)"))
    (pad 13 thru_hole circle (at 6.35 -1.27 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 12 "Net-(U1-Pad13)"))
    (pad 14 thru_hole circle (at 6.35 -3.81 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 13 "Net-(U1-Pad14)"))
    (pad 15 thru_hole circle (at 6.35 -6.35 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 5 "Net-(Q2-Pad2)"))
    (pad 16 thru_hole circle (at 6.35 -8.89 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 3 "Net-(Q1-Pad2)"))
  )
  (module TO_SOT_Packages_THT:TO-92_Inline_Wide (layer F.Cu) (tedit 58CE52AF)
    (at 160.655 125.095)
    (descr "TO-92 leads in-line, wide, drill 0.8mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (fp_text reference Q1 (at 2.54 -3.56 180) (layer F.SilkS))
    (fp_text value PN2222A (at 2.54 2.79) (layer F.Fab))
    (fp_text user %R (at 2.54 -3.56 180) (layer F.Fab))
    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(Q1-Pad2)"))
    (pad 3 thru_hole circle (at 5.08 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(Q1-Pad3)"))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/TO_SOT_Packages_THT.3dshapes/TO-92_Inline_Wide.wrl
      (at (xyz 0.1 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )
  (module TO_SOT_Packages_THT:TO-92_Inline_Wide (layer F.Cu) (tedit 58CE52AF)
    (at 160.655 119.38)
    (descr "TO-92 leads in-line, wide, drill 0.8mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (fp_text reference Q2 (at 2.54 -3.56 180) (layer F.SilkS))
    (fp_text value PN2222A (at 2.54 2.79) (layer F.Fab))
    (fp_text user %R (at 2.54 -3.56 180) (layer F.Fab))
    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(Q2-Pad2)"))
    (pad 3 thru_hole circle (at 5.08 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 "Net-(Q2-Pad3)"))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/TO_SOT_Packages_THT.3dshapes/TO-92_Inline_Wide.wrl
      (at (xyz 0.1 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )
  (module TO_SOT_Packages_THT:TO-92_Inline_Wide (layer F.Cu) (tedit 58CE52AF)
    (at 160.655 113.665)
    (descr "TO-92 leads in-line, wide, drill 0.8mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (fp_text reference Q3 (at 2.54 -3.56 180) (layer F.SilkS))
    (fp_text value PN2222A (at 2.54 2.79) (layer F.Fab))
    (fp_text user %R (at 2.54 -3.56 180) (layer F.Fab))
    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 8 "Net-(Q3-Pad2)"))
    (pad 3 thru_hole circle (at 5.08 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 14 "Net-(Q3-Pad3)"))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.52 1.52) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/TO_SOT_Packages_THT.3dshapes/TO-92_Inline_Wide.wrl
      (at (xyz 0.1 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )
  (gr_text "1B G\n1A E\n2A S\n2B D" (at 164.846 119.38) (layer F.SilkS))
  (gr_text GND (at 165.354 113.03) (layer B.SilkS))
  (gr_text EN (at 157.734 110.49) (layer B.SilkS))
  (gr_text GND (at 165.354 128.27) (layer B.SilkS))
  (gr_text STEP (at 158.496 125.73) (layer B.SilkS))
  (gr_text DIR (at 157.988 128.27) (layer B.SilkS))
  (gr_line (start 169.164 109.474) (end 169.164 129.286) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 154.432 109.474) (end 169.164 109.474) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 154.432 129.286) (end 154.432 109.474) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 169.164 129.286) (end 154.432 129.286) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_text "MarginallyClever.com\n2019-03-04 ELEC-0134" (at 158.115 119.38 90) (layer F.SilkS))
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 154.432 109.474) (xy 169.164 109.474) (xy 169.164 129.286) (xy 154.432 129.286)
      )
    )
  )
)
