(kicad_pcb (version 20171130) (host pcbnew 5.1.1-8be2ce7~80~ubuntu18.10.1)
  (general
    (thickness 1.6)
    (drawings 16)
    (tracks 14)
    (zones 0)
    (modules 2)
    (nets 6)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.254)
    (user_trace_width 0.6)
    (user_trace_width 2)
    (user_trace_width 2.54)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.15)
    (via_size 0.6)
    (via_drill 0.33)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.15)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.7 1.7)
    (pad_drill 1)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_80000001)
      (usegerberextensions true)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "output/"))
  )
  (net 0 "")
  (net 1 GND)
  (net 2 SDA)
  (net 3 SCL)
  (net 4 "Net-(J1-Pad1)")
  (net 5 VDD)
  (net_class Default "This is the default net class."
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6)
    (via_drill 0.33)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net "Net-(J1-Pad1)")
    (add_net SCL)
    (add_net SDA)
    (add_net VDD)
  )
  (module mrmeeseeks:Badgelife-Shitty-2x2 (layer F.Cu) (tedit 5AC7D7CF)
    (at 128.5 179.5)
    (descr "Through hole angled pin header, 2x02, 2.54mm pitch, 6mm pin length, double rows")
    (tags "Through hole angled pin header THT 2x02 2.54mm double row")
    (fp_text reference X1 (at 0 0) (layer F.Fab))
    (fp_text value SAO (at 0 4.2) (layer F.Fab))
    (fp_text user sda (at 3.5 -1.5) (layer F.SilkS))
    (fp_text user scl (at 3.25 2.25) (layer F.SilkS))
    (fp_text user gnd (at -3.25 2.25) (layer F.SilkS))
    (fp_text user 3.3v (at -3.5 -1.5) (layer F.SilkS))
    (pad 4 thru_hole circle (at 1.27 -1.27) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 SDA))
    (pad 3 thru_hole oval (at 1.27 1.27) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 SCL))
    (pad 1 thru_hole oval (at -1.27 -1.27) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 VDD))
    (pad 2 thru_hole oval (at -1.27 1.27) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 GND))
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x05_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
    (at 123.08 168.23 90)
    (descr "Through hole straight pin header, 1x05, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x05 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33 90) (layer F.SilkS))
    (fp_text value PN532 (at 0 12.49 90) (layer F.Fab))
    (fp_text user %R (at 0 5.08) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 GND))
    (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 VDD))
    (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 SDA))
    (pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 SCL))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x05_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_line (start 137.32002 160.99028) (end 120.07342 160.96996) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 139.13612 181.05882) (end 139.16914 162.84956) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 120.1674 182.92572) (end 137.3251 182.9181) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 118.21414 162.8521) (end 118.3005 181.07152) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 120.17 181.04) (end 118.290001 181.059999) (angle -89.39049342) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 137.280001 181.040001) (end 137.3 182.92) (angle -89.39049342) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 137.289999 162.870105) (end 139.169998 162.850106) (angle -89.39049342) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 120.090105 162.850001) (end 120.070106 160.970002) (angle -89.39049342) (layer Edge.Cuts) (width 0.15))
  (gr_text "PN532 NFC to SAO\nDrew Fustini\ndrew@oshpark.com" (at 128.78 173.25) (layer B.Mask))
  (gr_text "PN532 NFC to SAO\nDrew Fustini\ndrew@oshpark.com" (at 128.79 173.25) (layer B.Cu))
  (gr_text "PN532 NFC to SAO\nDrew Fustini\ndrew@oshpark.com" (at 129.17 173.41) (layer F.SilkS))
  (gr_text SCL (at 133.30174 165.02634 90) (layer F.SilkS))
  (gr_text SDA (at 130.69824 165.33622 90) (layer F.SilkS))
  (gr_text 3V3 (at 128.0287 164.99332 90) (layer F.SilkS))
  (gr_text "GND\n" (at 125.45822 165.19906 90) (layer F.SilkS))
  (gr_text 5V (at 122.7963 165.54958 90) (layer F.SilkS))
)
