Altium

Design Rule Verification Report

Date: 2018-11-14
Time: 2:09:02 PM
Elapsed Time: 00:00:01
Filename: C:\Users\marq1234\Documents\E18-024 Isolation Amplifier\E18-024 Isolation Amplifier.PcbDoc
Warnings: 0
Rule Violations: 50

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=8mil) (All),(All) 0
Clearance Constraint (Gap=20mil) (InPolygon),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=8mil) (Max=100mil) (Preferred=20mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=10mil) (All) 0
Acute Angle Constraint (Minimum=30.000) (All) 0
Hole Size Constraint (Min=20mil) (Max=250mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=2mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=10mil) (All),(All) 0
Silk To Solder Mask (Clearance=5.9mil) (IsPad),(All) 30
Silk to Silk (Clearance=2mil) (All),(All) 18
Net Antennae (Tolerance=0mil) (All) 0
Room Side A power supply and references (Bounding Region = (1905mil, 3770mil, 3700mil, 4315mil) (InComponentClass('Side A power supply and references')) 0
Room OI_CH4 (Bounding Region = (1100mil, 1445mil, 6900mil, 2170mil) (InComponentClass('OI_CH4')) 0
Room E18-024 Isolation Amplifier Top_1 (Bounding Region = (1120mil, 3770mil, 1825mil, 4315mil) (InComponentClass('E18-024 Isolation Amplifier Top')) 1
Room Side B power supply and references (Bounding Region = (4315mil, 3765mil, 6110mil, 4310mil) (InComponentClass('Side B power supply and references')) 0
Room E18-024 Isolation Amplifier Top (Bounding Region = (6175mil, 3650mil, 6905mil, 4460mil) (InComponentClass('E18-024 Isolation Amplifier Top')) 1
Room OI_CH3 (Bounding Region = (1100.63mil, 2180mil, 6900.63mil, 2905mil) (InComponentClass('OI_CH3')) 0
Room IO_CH2 (Bounding Region = (1100mil, 5205mil, 6900mil, 5930mil) (InComponentClass('IO_CH2')) 0
Room IO_CH1 (Bounding Region = (1100mil, 5935mil, 6900mil, 6660mil) (InComponentClass('IO_CH1')) 0
Room OI_CH2 (Bounding Region = (1100mil, 2915mil, 6900mil, 3640mil) (InComponentClass('OI_CH2')) 0
Room OI_CH1 (Bounding Region = (1103.464mil, 4475mil, 6903.464mil, 5200mil) (InComponentClass('OI_CH1')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 50

Silk To Solder Mask (Clearance=5.9mil) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_IO_CH1-2(2085mil,6255.63mil) on Component Side And Text "TP2_IO_CH1" (2088mil,6187mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_IO_CH2-2(2085mil,5525.63mil) on Component Side And Text "TP2_IO_CH2" (2088mil,5457mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_OI_CH1-2(2088.464mil,4795.63mil) on Component Side And Text "TP2_OI_CH1" (2091.464mil,4727mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_OI_CH2-2(2085mil,3235.63mil) on Component Side And Text "TP2_OI_CH2" (2088mil,3167mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_OI_CH3-2(2085.63mil,2500.63mil) on Component Side And Text "TP2_OI_CH3" (2088.63mil,2432mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad C1_OI_CH4-2(2085mil,1765.63mil) on Component Side And Text "TP2_OI_CH4" (2088mil,1697mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_IO_CH1-1(1829.37mil,6080mil) on Component Side And Text "R3_IO_CH1" (1745mil,6045mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_IO_CH1-2(1750.63mil,6080mil) on Component Side And Text "R3_IO_CH1" (1745mil,6045mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_IO_CH2-1(1829.37mil,5350mil) on Component Side And Text "R3_IO_CH2" (1745mil,5315mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_IO_CH2-2(1750.63mil,5350mil) on Component Side And Text "R3_IO_CH2" (1745mil,5315mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH1-1(1832.834mil,4620mil) on Component Side And Text "R3_OI_CH1" (1748.464mil,4585mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH1-2(1754.094mil,4620mil) on Component Side And Text "R3_OI_CH1" (1748.464mil,4585mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH2-1(1829.37mil,3060mil) on Component Side And Text "R3_OI_CH2" (1745mil,3025mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH2-2(1750.63mil,3060mil) on Component Side And Text "R3_OI_CH2" (1745mil,3025mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH3-1(1830mil,2325mil) on Component Side And Text "R3_OI_CH3" (1745.63mil,2290mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH3-2(1751.26mil,2325mil) on Component Side And Text "R3_OI_CH3" (1745.63mil,2290mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH4-1(1829.37mil,1590mil) on Component Side And Text "R3_OI_CH4" (1745mil,1555mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad R6_OI_CH4-2(1750.63mil,1590mil) on Component Side And Text "R3_OI_CH4" (1745mil,1555mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_IO_CH1-4(4460.512mil,6210mil) on Component Side And Text "C16_IO_CH1" (4337mil,6197mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_IO_CH2-4(4460.512mil,5480mil) on Component Side And Text "C16_IO_CH2" (4337mil,5467mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_OI_CH1-4(4463.976mil,4750mil) on Component Side And Text "C16_OI_CH1" (4340.464mil,4737mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_OI_CH2-4(4460.512mil,3190mil) on Component Side And Text "C16_OI_CH2" (4337mil,3177mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_OI_CH3-4(4461.142mil,2455mil) on Component Side And Text "C16_OI_CH3" (4337.63mil,2442mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U4_OI_CH4-4(4460.512mil,1720mil) on Component Side And Text "C16_OI_CH4" (4337mil,1707mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_IO_CH1-4(6160.512mil,6215.63mil) on Component Side And Text "C17_IO_CH1" (6112mil,6197mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_IO_CH2-4(6160.512mil,5485.63mil) on Component Side And Text "C17_IO_CH2" (6112mil,5467mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_OI_CH1-4(6163.976mil,4755.63mil) on Component Side And Text "C17_OI_CH1" (6115.464mil,4737mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_OI_CH2-4(6160.512mil,3195.63mil) on Component Side And Text "C17_OI_CH2" (6112mil,3177mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_OI_CH3-4(6161.142mil,2460.63mil) on Component Side And Text "C17_OI_CH3" (6112.63mil,2442mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 5.9mil) Between Pad U5_OI_CH4-4(6160.512mil,1725.63mil) on Component Side And Text "C17_OI_CH4" (6112mil,1707mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]

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Silk to Silk (Clearance=2mil) (All),(All)
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_IO_CH1" (6112mil,6197mil) on Top Overlay And Track (6219.566mil,6192.204mil)(6219.566mil,6389.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_IO_CH2" (6112mil,5467mil) on Top Overlay And Track (6219.566mil,5462.204mil)(6219.566mil,5659.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_OI_CH1" (6115.464mil,4737mil) on Top Overlay And Track (6223.03mil,4732.204mil)(6223.03mil,4929.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_OI_CH2" (6112mil,3177mil) on Top Overlay And Track (6219.566mil,3172.204mil)(6219.566mil,3369.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_OI_CH3" (6112.63mil,2442mil) on Top Overlay And Track (6220.196mil,2437.204mil)(6220.196mil,2634.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (0.661mil < 2mil) Between Text "C17_OI_CH4" (6112mil,1707mil) on Top Overlay And Track (6219.566mil,1702.204mil)(6219.566mil,1899.056mil) on Top Overlay Silk Text to Silk Clearance [0.661mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_IO_CH1" (6080mil,6620mil) on Top Overlay And Text "R12_IO_CH1" (6160.512mil,6435mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_IO_CH2" (6080mil,5890mil) on Top Overlay And Text "R12_IO_CH2" (6160.512mil,5705mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_OI_CH1" (6083.464mil,5160mil) on Top Overlay And Text "R12_OI_CH1" (6163.976mil,4975mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_OI_CH2" (6080mil,3600mil) on Top Overlay And Text "R12_OI_CH2" (6160.512mil,3415mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_OI_CH3" (6080.63mil,2865mil) on Top Overlay And Text "R12_OI_CH3" (6161.142mil,2680mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "JP2_OI_CH4" (6080mil,2130mil) on Top Overlay And Text "R12_OI_CH4" (6160.512mil,1945mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_IO_CH1" (1745mil,6045mil) on Top Overlay And Track (1790mil,6054.41mil)(1790mil,6105.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_IO_CH2" (1745mil,5315mil) on Top Overlay And Track (1790mil,5324.41mil)(1790mil,5375.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_OI_CH1" (1748.464mil,4585mil) on Top Overlay And Track (1793.464mil,4594.41mil)(1793.464mil,4645.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_OI_CH2" (1745mil,3025mil) on Top Overlay And Track (1790mil,3034.41mil)(1790mil,3085.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_OI_CH3" (1745.63mil,2290mil) on Top Overlay And Track (1790.63mil,2299.41mil)(1790.63mil,2350.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 2mil) Between Text "R3_OI_CH4" (1745mil,1555mil) on Top Overlay And Track (1790mil,1564.41mil)(1790mil,1615.59mil) on Top Overlay Silk Text to Silk Clearance [0mil]

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Room E18-024 Isolation Amplifier Top_1 (Bounding Region = (1120mil, 3770mil, 1825mil, 4315mil) (InComponentClass('E18-024 Isolation Amplifier Top'))
Room Definition: Between Component PB-HEADER 1X6 (6790mil,3975mil) on Component Side And Room E18-024 Isolation Amplifier Top_1 (Bounding Region = (1120mil, 3770mil, 1825mil, 4315mil) (InComponentClass('E18-024 Isolation Amplifier Top'))

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Room E18-024 Isolation Amplifier Top (Bounding Region = (6175mil, 3650mil, 6905mil, 4460mil) (InComponentClass('E18-024 Isolation Amplifier Top'))
Room Definition: Between Component PA-HEADER 1X6 (1225mil,4105mil) on Component Side And Room E18-024 Isolation Amplifier Top (Bounding Region = (6175mil, 3650mil, 6905mil, 4460mil) (InComponentClass('E18-024 Isolation Amplifier Top'))

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