(kicad_pcb (version 20171130) (host pcbnew "(5.0.0-rc2-dev-70-g2da7199a3)")
  (general
    (thickness 1.6)
    (drawings 7)
    (tracks 61)
    (zones 0)
    (modules 4)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.25)
    (user_trace_width 0.5)
    (trace_clearance 0.2)
    (zone_clearance 0.5)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.001)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (user_via 0.5 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 0.5 0.5)
    (pad_drill 0)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(J1-Pad1)")
  (net 2 "Net-(J1-Pad5)")
  (net 3 "Net-(J1-Pad2)")
  (net 4 "Net-(J1-Pad6)")
  (net 5 "Net-(J1-Pad3)")
  (net 6 "Net-(J1-Pad7)")
  (net 7 GND)
  (net 8 +5V)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +5V)
    (add_net GND)
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(J1-Pad6)")
    (add_net "Net-(J1-Pad7)")
  )
  (module Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.50mm_HandSolder (layer B.Cu) (tedit 5B61A41B)
    (at 35 52.0425 90)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags "capacitor handsolder")
    (attr smd)
    (fp_text reference 100p (at 0.0425 1.8 90) (layer B.SilkS))
    (fp_text value C_Small (at -0.4575 -8.5 90) (layer B.Fab))
    (fp_text user %R (at 2.5575 0 180) (layer B.Fab))
    (pad 2 smd rect (at 1.0425 0 90) (size 1.145 1.5) (layers B.Cu B.Paste B.Mask)
      (net 8 +5V))
    (pad 1 smd rect (at -1.0425 0 90) (size 1.145 1.5) (layers B.Cu B.Paste B.Mask)
      (net 7 GND))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.50mm_HandSolder (layer B.Cu) (tedit 5B61A416)
    (at 35 46.1575 270)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags "capacitor handsolder")
    (attr smd)
    (fp_text reference 100n (at -1.5575 -1.6 90) (layer B.SilkS))
    (fp_text value C_Small (at -0.4575 8.3 270) (layer B.Fab))
    (fp_text user %R (at 2.6425 0) (layer B.Fab))
    (pad 1 smd rect (at -1.0425 0 270) (size 1.145 1.5) (layers B.Cu B.Paste B.Mask)
      (net 8 +5V))
    (pad 2 smd rect (at 1.0425 0 270) (size 1.145 1.5) (layers B.Cu B.Paste B.Mask)
      (net 7 GND))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DFN_QFN:DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm (layer F.Cu) (tedit 5B61B977)
    (at 35.05 49 270)
    (descr "8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "DFN 0.5")
    (solder_mask_margin 0.05)
    (clearance 0.05)
    (attr smd)
    (fp_text reference J1 (at -11.16 3.5) (layer F.SilkS) hide)
    (fp_text value Conn_02x04_Counter_Clockwise (at -0.4 13.65 270) (layer F.Fab))
    (fp_text user %R (at 0 0 270) (layer F.Fab))
    (pad 1 smd rect (at -1.45 -0.75 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(J1-Pad1)"))
    (pad 2 smd rect (at -1.45 -0.25 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(J1-Pad2)"))
    (pad 3 smd rect (at -1.45 0.25 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 smd rect (at -1.45 0.75 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 5 smd rect (at 1.45 0.75 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(J1-Pad5)"))
    (pad 6 smd rect (at 1.45 0.25 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(J1-Pad6)"))
    (pad 7 smd rect (at 1.45 -0.25 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad7)"))
    (pad 8 smd rect (at 1.45 -0.75 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)
      (net 8 +5V))
    (pad "" smd rect (at -0.4375 0.3625 270) (size 0.71 0.58) (layers F.Paste))
    (pad 9 smd rect (at 0 0 270) (size 1.75 1.45) (layers F.Cu F.Mask)
      (net 7 GND))
    (pad "" smd rect (at 0.4375 0.3625 270) (size 0.71 0.58) (layers F.Paste))
    (pad "" smd rect (at 0.4375 -0.3625 270) (size 0.71 0.58) (layers F.Paste))
    (pad "" smd rect (at -0.4375 -0.3625 270) (size 0.71 0.58) (layers F.Paste))
    (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DIP:DIP-8_W7.62mm_Socket_LongPads (layer F.Cu) (tedit 5B61B973)
    (at 31.3 45.3)
    (descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads")
    (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads")
    (fp_text reference U1 (at 7.58 -7.42) (layer F.SilkS) hide)
    (fp_text value Opamp_Dual_Generic (at 3.9 10.9) (layer F.Fab))
    (fp_text user %R (at 3.95 8.05) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(J1-Pad1)"))
    (pad 5 thru_hole oval (at 7.62 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(J1-Pad5)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad2)"))
    (pad 6 thru_hole oval (at 7.62 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(J1-Pad6)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 7 thru_hole oval (at 7.62 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad7)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 7 GND))
    (pad 8 thru_hole oval (at 7.62 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 8 +5V))
    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-8_W7.62mm_Socket.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text 1 (at 36.7 47.15) (layer F.SilkS))
  (gr_text GND (at 31.2 54.4) (layer B.SilkS))
  (gr_text 5V (at 39 43.8) (layer B.SilkS))
  (gr_line (start 41.425 55) (end 28.8 55) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 41.425 43) (end 41.425 55) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 28.8 43) (end 41.425 43) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 28.8 55) (end 28.8 43) (layer Edge.Cuts) (width 0.001))
  (zone (net 7) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.5))
    (min_thickness 0.25)
    (fill yes (arc_segments 16) (thermal_gap 0.5) (thermal_bridge_width 0.5))
    (polygon
      (pts
        (xy 28.8 43) (xy 28.8 55) (xy 41.425 55) (xy 41.425 43)
      )
    )
  )
  (zone (net 8) (net_name +5V) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.5))
    (min_thickness 0.25)
    (fill yes (arc_segments 16) (thermal_gap 0.5) (thermal_bridge_width 0.5))
    (polygon
      (pts
        (xy 28.8 43) (xy 28.8 55) (xy 41.425 55) (xy 41.425 43)
      )
    )
  )
)
