(kicad_pcb (version 20171130) (host pcbnew 5.1.6-1.fc32)
  (general
    (thickness 1.6)
    (drawings 4)
    (tracks 52)
    (zones 0)
    (modules 3)
    (nets 1)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.05)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
  )
  (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE)
    (at 150.114 53.086)
    (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference IC (at 0 1.43) (layer B.SilkS))
    (fp_text value C_0603_1608Metric (at 0 -1.43) (layer B.Fab))
    (fp_text user %R (at 0 0) (layer B.Fab))
    (pad 2 smd roundrect (at 0.775 0) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25))
    (pad 1 smd roundrect (at -0.775 0) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DIP:DIP-16_W10.16mm (layer F.Cu) (tedit 5A02E8C5)
    (at 145.034 48.514)
    (descr "16-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils)")
    (tags "THT DIP DIL PDIP 2.54mm 10.16mm 400mil")
    (fp_text reference MAF (at 5.334 -0.254) (layer F.SilkS))
    (fp_text value DIP-16_W10.16mm (at 5.08 20.11) (layer F.Fab))
    (fp_text user %R (at 5.08 8.89) (layer F.Fab))
    (pad 16 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 15 thru_hole oval (at 10.16 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 14 thru_hole oval (at 10.16 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 13 thru_hole oval (at 10.16 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 12 thru_hole oval (at 10.16 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 11 thru_hole oval (at 10.16 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 10 thru_hole oval (at 10.16 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 9 thru_hole oval (at 10.16 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W10.16mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5D9F72B1)
    (at 150.049 57.531)
    (descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
    (tags "SOIC SO")
    (attr smd)
    (fp_text reference 16 (at 0 -5.9) (layer F.SilkS))
    (fp_text value SOIC-16_3.9x9.9mm_P1.27mm (at 0 5.9) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 12 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 11 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 10 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 9 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 8 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 7 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 6 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
    (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_line (start 144.018 67.818) (end 144.018 46.99) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 156.21 67.818) (end 144.018 67.818) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 156.21 46.99) (end 156.21 67.818) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 144.018 46.99) (end 156.21 46.99) (layer Edge.Cuts) (width 0.05))
)
