(kicad_pcb (version 4) (host pcbnew 4.0.7)
  (general
    (links 28)
    (no_connects 0)
    (area 135.219342 80.1426 171.688858 105.4282)
    (thickness 1.6)
    (drawings 5)
    (tracks 113)
    (zones 0)
    (modules 15)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.1524)
    (trace_clearance 0.1524)
    (zone_clearance 0.2)
    (zone_45_only yes)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.762)
    (uvia_drill 0.508)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 GND)
  (net 3 "Net-(C2-Pad1)")
  (net 4 "Net-(C2-Pad2)")
  (net 5 "Net-(C3-Pad1)")
  (net 6 "Net-(D1-Pad1)")
  (net 7 "Net-(D2-Pad2)")
  (net 8 "Net-(R1-Pad2)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.762)
    (uvia_drill 0.508)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C2-Pad1)")
    (add_net "Net-(C2-Pad2)")
    (add_net "Net-(C3-Pad1)")
    (add_net "Net-(D1-Pad1)")
    (add_net "Net-(D2-Pad2)")
    (add_net "Net-(R1-Pad2)")
  )
  (module Capacitors_Tantalum_SMD:CP_Tantalum_Case-A_EIA-3216-18_Reflow placed (layer F.Cu) (tedit 58CC8C08)
    (at 146.199 101.5492)
    (descr "Tantalum capacitor, Case A, EIA 3216-18, 3.2x1.6x1.6mm, Reflow soldering footprint")
    (tags "capacitor tantalum smd")
    (attr smd)
    (fp_text reference C1 (at 0 -2.55) (layer F.SilkS))
    (fp_text value 22uF (at 0 2.55) (layer F.Fab))
    (fp_text user %R (at -0.0508 0.4572) (layer F.Fab))
    (pad 1 smd rect (at -1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-A_EIA-3216-18.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_Tantalum_SMD:CP_Tantalum_Case-A_EIA-3216-18_Reflow placed (layer F.Cu) (tedit 58CC8C08)
    (at 145.9992 83.6676 180)
    (descr "Tantalum capacitor, Case A, EIA 3216-18, 3.2x1.6x1.6mm, Reflow soldering footprint")
    (tags "capacitor tantalum smd")
    (attr smd)
    (fp_text reference C2 (at 0 -2.55 180) (layer F.SilkS))
    (fp_text value 39pF (at 0 2.55 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd rect (at -1.375 0 180) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 smd rect (at 1.375 0 180) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (model Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-A_EIA-3216-18.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_Tantalum_SMD:CP_Tantalum_Case-A_EIA-3216-18_Reflow placed (layer F.Cu) (tedit 58CC8C08)
    (at 154.0764 101.8032)
    (descr "Tantalum capacitor, Case A, EIA 3216-18, 3.2x1.6x1.6mm, Reflow soldering footprint")
    (tags "capacitor tantalum smd")
    (attr smd)
    (fp_text reference C3 (at 0 -2.55) (layer F.SilkS))
    (fp_text value 100nF (at 0 2.55) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad1)"))
    (pad 2 smd rect (at 1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-A_EIA-3216-18.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_Tantalum_SMD:CP_Tantalum_Case-A_EIA-3216-18_Reflow placed (layer F.Cu) (tedit 58CC8C08)
    (at 160.6804 97.155)
    (descr "Tantalum capacitor, Case A, EIA 3216-18, 3.2x1.6x1.6mm, Reflow soldering footprint")
    (tags "capacitor tantalum smd")
    (attr smd)
    (fp_text reference C4 (at 0 -2.55) (layer F.SilkS))
    (fp_text value 68uF (at 0 2.55) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 smd rect (at 1.375 0) (size 1.95 1.5) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-A_EIA-3216-18.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module LEDs:LED_1206 placed (layer F.Cu) (tedit 57FE943C)
    (at 153.798 83.6676)
    (descr "LED 1206 smd package")
    (tags "LED led 1206 SMD smd SMT smt smdled SMDLED smtled SMTLED")
    (attr smd)
    (fp_text reference D1 (at 0 -1.6) (layer F.SilkS))
    (fp_text value LED (at 0 1.7) (layer F.Fab))
    (pad 2 smd rect (at 1.65 0 180) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 1 smd rect (at -1.65 0 180) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(D1-Pad1)"))
    (model ${KISYS3DMOD}/LEDs.3dshapes/LED_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )
  (module Diodes_SMD:D_1206 placed (layer F.Cu) (tedit 590CEAF5)
    (at 160.3756 91.5938 90)
    (descr "Diode SMD 1206, reflow soldering http://datasheets.avx.com/schottky.pdf")
    (tags "Diode 1206")
    (attr smd)
    (fp_text reference D2 (at 0 -1.8 90) (layer F.SilkS))
    (fp_text value D_Schottky (at 0 1.9 90) (layer F.Fab))
    (fp_text user %R (at 0 -1.8 90) (layer F.Fab))
    (pad 1 smd rect (at -1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 smd rect (at 1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(D2-Pad2)"))
    (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm placed (layer F.Cu) (tedit 59650532)
    (at 142.0622 90.0176)
    (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x02 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS))
    (fp_text value Conn_01x02_Male (at 0 4.87) (layer F.Fab))
    (fp_text user %R (at -0.2286 1.3208 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm placed (layer F.Cu) (tedit 59650532)
    (at 164.846 90.0176)
    (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x02 2.54mm single row")
    (fp_text reference J2 (at 0 -2.33) (layer F.SilkS))
    (fp_text value Conn_01x02_Male (at 0 4.87) (layer F.Fab))
    (fp_text user %R (at 0 1.27 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Inductors_SMD:L_1210 placed (layer F.Cu) (tedit 58307C54)
    (at 153.7716 88.1126)
    (descr "Resistor SMD 1210, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1210")
    (attr smd)
    (fp_text reference L1 (at 0 -2.7) (layer F.SilkS))
    (fp_text value 6.8uH (at 0 2.7) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0) (size 0.9 2.5) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 1.45 0) (size 0.9 2.5) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(D2-Pad2)"))
    (model ${KISYS3DMOD}/Inductors_SMD.3dshapes/L_1210.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_1206 placed (layer F.Cu) (tedit 58E0A804)
    (at 146.3272 91.2876 180)
    (descr "Resistor SMD 1206, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1206")
    (attr smd)
    (fp_text reference R1 (at 0 -1.85 180) (layer F.SilkS))
    (fp_text value 200k (at 0 1.95 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0 180) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad1)"))
    (pad 2 smd rect (at 1.45 0 180) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(R1-Pad2)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_1206 placed (layer F.Cu) (tedit 58E0A804)
    (at 161.4192 84.7852)
    (descr "Resistor SMD 1206, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1206")
    (attr smd)
    (fp_text reference R2 (at 0 -1.85) (layer F.SilkS))
    (fp_text value 150k (at 0 1.95) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 smd rect (at 1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_1206 placed (layer F.Cu) (tedit 58E0A804)
    (at 160.6042 101.727)
    (descr "Resistor SMD 1206, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1206")
    (attr smd)
    (fp_text reference R3 (at 0 -1.85) (layer F.SilkS))
    (fp_text value 500k (at 0 1.95) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 smd rect (at 1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad1)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_1206 placed (layer F.Cu) (tedit 58E0A804)
    (at 153.7208 96.9772)
    (descr "Resistor SMD 1206, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1206")
    (attr smd)
    (fp_text reference R4 (at 0 -1.85) (layer F.SilkS))
    (fp_text value 50k (at 0 1.95) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (pad 2 smd rect (at 1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_1206 placed (layer F.Cu) (tedit 58E0A804)
    (at 146.2024 96.8502)
    (descr "Resistor SMD 1206, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 1206")
    (attr smd)
    (fp_text reference R5 (at 0 -1.85) (layer F.SilkS))
    (fp_text value 150 (at 0 1.95) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(D1-Pad1)"))
    (pad 2 smd rect (at 1.45 0) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_1206.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SSOP:MSOP-8_3x3mm_Pitch0.65mm placed (layer F.Cu) (tedit 54130A77)
    (at 153.8224 92.2528)
    (descr "8-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U1 (at 0 -2.6) (layer F.SilkS))
    (fp_text value LM2621 (at 0 2.6) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -2.2 -0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 2 smd rect (at -2.2 -0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad1)"))
    (pad 3 smd rect (at -2.2 0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(R1-Pad2)"))
    (pad 4 smd rect (at -2.2 0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (pad 5 smd rect (at 2.2 0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 6 smd rect (at 2.2 0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad1)"))
    (pad 7 smd rect (at 2.2 -0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 8 smd rect (at 2.2 -0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(D2-Pad2)"))
    (model ${KISYS3DMOD}/Housings_SSOP.3dshapes/MSOP-8_3x3mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text "LM2621 Breakout board\nA <3 AM & MM" (at 153.5684 92.5322) (layer B.SilkS))
  (gr_line (start 140 104) (end 140 81) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 167 104) (end 140 104) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 167 81) (end 167 104) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 140 81) (end 167 81) (angle 90) (layer Edge.Cuts) (width 0.1))
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.2))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 167 104) (xy 140 104) (xy 140 81) (xy 167 81)
      )
    )
  )
)
