(kicad_pcb (version 4) (host pcbnew 4.0.1-2.fc23-product)
  (general
    (links 50)
    (no_connects 0)
    (area 85.089499 87.629499 123.190501 106.680501)
    (thickness 1.6)
    (drawings 4)
    (tracks 333)
    (zones 0)
    (modules 8)
    (nets 23)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.3)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.1524)
    (aux_axis_origin 0 0)
    (grid_origin 129.54 127)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 /CH_5-)
  (net 2 /OUT-)
  (net 3 GND)
  (net 4 /CH_4-)
  (net 5 /CH_4+)
  (net 6 /CH_3-)
  (net 7 /CH_3+)
  (net 8 /OUT+)
  (net 9 /CH_5+)
  (net 10 /~VS3)
  (net 11 /~VS4)
  (net 12 VCC)
  (net 13 /CH_2-)
  (net 14 /CH_2+)
  (net 15 /CH_1-)
  (net 16 /CH_1+)
  (net 17 /~VS1)
  (net 18 /~VS2)
  (net 19 VEE)
  (net 20 /SEL_C)
  (net 21 /SEL_B)
  (net 22 /SEL_A)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /CH_1+)
    (add_net /CH_1-)
    (add_net /CH_2+)
    (add_net /CH_2-)
    (add_net /CH_3+)
    (add_net /CH_3-)
    (add_net /CH_4+)
    (add_net /CH_4-)
    (add_net /CH_5+)
    (add_net /CH_5-)
    (add_net /OUT+)
    (add_net /OUT-)
    (add_net /SEL_A)
    (add_net /SEL_B)
    (add_net /SEL_C)
    (add_net /~VS1)
    (add_net /~VS2)
    (add_net /~VS3)
    (add_net /~VS4)
    (add_net GND)
    (add_net VCC)
    (add_net VEE)
  )
  (module Connect:HE10_26D (layer B.Cu) (tedit 576EB536)
    (at 123.19 87.63 180)
    (descr "Connecteur HE10 26 contacts droit")
    (tags "CONN HE10")
    (fp_text reference P1 (at 36.83 -1.27 180) (layer F.SilkS))
    (fp_text value DIL_26 (at 2.54 -15.24 180) (layer B.Fab))
    (pad 13 connect rect (at 3.81 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 10 /~VS3))
    (pad 12 connect rect (at 6.35 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 9 /CH_5+))
    (pad 11 connect rect (at 8.89 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 8 /OUT+))
    (pad 10 connect rect (at 11.43 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 9 connect rect (at 13.97 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 7 /CH_3+))
    (pad 8 connect rect (at 16.51 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 6 /CH_3-))
    (pad 7 connect rect (at 19.05 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 6 connect rect (at 21.59 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 5 /CH_4+))
    (pad 5 connect rect (at 24.13 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 4 /CH_4-))
    (pad 4 connect rect (at 26.67 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 3 connect rect (at 29.21 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 2 /OUT-))
    (pad 2 connect rect (at 31.75 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 1 /CH_5-))
    (pad 1 connect rect (at 34.29 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask))
    (pad 26 connect rect (at 34.29 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 19 VEE))
    (pad 25 connect rect (at 31.75 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 18 /~VS2))
    (pad 24 connect rect (at 29.21 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 17 /~VS1))
    (pad 23 connect rect (at 26.67 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 16 /CH_1+))
    (pad 22 connect rect (at 24.13 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 21 connect rect (at 21.59 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 15 /CH_1-))
    (pad 20 connect rect (at 19.05 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 19 connect rect (at 16.51 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 14 /CH_2+))
    (pad 18 connect rect (at 13.97 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 17 connect rect (at 11.43 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 13 /CH_2-))
    (pad 16 connect rect (at 8.89 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask))
    (pad 15 connect rect (at 6.35 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 12 VCC))
    (pad 14 connect rect (at 3.81 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 11 /~VS4))
  )
  (module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 54130A77)
    (at 104.14 97.155 270)
    (descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U1 (at -4.445 0 360) (layer F.SilkS))
    (fp_text value 74LS148 (at 0 6 270) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 3 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 4 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 5 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 6 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 20 /SEL_C))
    (pad 7 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 21 /SEL_B))
    (pad 8 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 9 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 22 /SEL_A))
    (pad 10 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 17 /~VS1))
    (pad 11 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 18 /~VS2))
    (pad 12 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 /~VS3))
    (pad 13 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 /~VS4))
    (pad 14 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 15 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 16 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 54130A77)
    (at 92.075 97.155 270)
    (descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U2 (at -4.445 0 360) (layer F.SilkS))
    (fp_text value 4051 (at 0 6 270) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 /CH_5+))
    (pad 2 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT+))
    (pad 4 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 5 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 6 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 7 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 8 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 9 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 20 /SEL_C))
    (pad 10 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 21 /SEL_B))
    (pad 11 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 22 /SEL_A))
    (pad 12 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 /CH_4+))
    (pad 13 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 16 /CH_1+))
    (pad 14 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 14 /CH_2+))
    (pad 15 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 /CH_3+))
    (pad 16 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer F.Cu) (tedit 54130A77)
    (at 116.205 97.155 270)
    (descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U3 (at -4.445 0 360) (layer F.SilkS))
    (fp_text value 4051 (at 0 6 270) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 /CH_5-))
    (pad 2 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 /OUT-))
    (pad 4 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 5 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 6 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 7 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 8 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 9 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 20 /SEL_C))
    (pad 10 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 21 /SEL_B))
    (pad 11 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 22 /SEL_A))
    (pad 12 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 /CH_4-))
    (pad 13 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 15 /CH_1-))
    (pad 14 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 13 /CH_2-))
    (pad 15 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 /CH_3-))
    (pad 16 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 95.885 102.235 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C1 (at 3.175 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 89.535 92.075 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C2 (at 3.175 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 120.015 102.235 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C3 (at 3.175 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 113.03 92.075 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C4 (at 3.175 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_line (start 123.19 106.68) (end 85.09 106.68) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 123.19 87.63) (end 123.19 106.68) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 85.09 87.63) (end 123.19 87.63) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 85.09 106.68) (end 85.09 87.63) (layer Edge.Cuts) (width 0.001))
  (zone (net 3) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.3))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 122.555 88.265) (xy 122.555 106.045) (xy 85.725 106.045) (xy 85.725 88.265)
      )
    )
  )
)
