(kicad_pcb (version 20171130) (host pcbnew 5.0.0-fee4fd1~65~ubuntu17.10.1)
  (general
    (thickness 1.6)
    (drawings 8)
    (tracks 75)
    (zones 0)
    (modules 5)
    (nets 25)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.2)
    (user_trace_width 0.4)
    (trace_clearance 0.16)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.16)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(C17-Pad1)")
  (net 2 GND)
  (net 3 /USB_VCC)
  (net 4 /USB_D-)
  (net 5 /USB_D+)
  (net 6 +3V3)
  (net 7 /TRIG)
  (net 8 /L_P)
  (net 9 /W_P)
  (net 10 /LINK)
  (net 11 /ACT)
  (net 12 /ETH_INT)
  (net 13 /ETH_RST)
  (net 14 /MOSI)
  (net 15 /OCP)
  (net 16 /MISO)
  (net 17 /LED_EN)
  (net 18 /SCLK)
  (net 19 /GPIO0)
  (net 20 /SCS)
  (net 21 /GPIO1)
  (net 22 "Net-(J9-Pad28)")
  (net 23 +5V)
  (net 24 "Net-(U3-Pad3)")
  (net_class Default "This is the default net class."
    (clearance 0.16)
    (trace_width 0.2)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +3V3)
    (add_net +5V)
    (add_net /ACT)
    (add_net /ETH_INT)
    (add_net /ETH_RST)
    (add_net /GPIO0)
    (add_net /GPIO1)
    (add_net /LED_EN)
    (add_net /LINK)
    (add_net /L_P)
    (add_net /MISO)
    (add_net /MOSI)
    (add_net /OCP)
    (add_net /SCLK)
    (add_net /SCS)
    (add_net /TRIG)
    (add_net /USB_D+)
    (add_net /USB_D-)
    (add_net /USB_VCC)
    (add_net /W_P)
    (add_net GND)
    (add_net "Net-(C17-Pad1)")
    (add_net "Net-(J9-Pad28)")
    (add_net "Net-(U3-Pad3)")
  )
  (module Capacitor_SMD:C_0805_2012Metric (layer B.Cu) (tedit 5D5C40C5)
    (at 112 79.25 90)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference C17 (at 0 1.65 90) (layer B.SilkS) hide)
    (fp_text value 10uF (at 0 -1.65 90) (layer B.Fab))
    (fp_text user %R (at 0 0 90) (layer B.Fab))
    (pad 1 smd roundrect (at -0.85 0 90) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391)
      (net 1 "Net-(C17-Pad1)"))
    (pad 2 smd roundrect (at 0.85 0 90) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391)
      (net 2 GND))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Diode_SMD:D_SMC (layer B.Cu) (tedit 5D5C40B9)
    (at 105.5 80.2 180)
    (descr "Diode SMC (DO-214AB)")
    (tags "Diode SMC (DO-214AB)")
    (attr smd)
    (fp_text reference D1 (at 0 4.1 180) (layer B.SilkS) hide)
    (fp_text value MBRS410LT3G (at 0 -4.2 180) (layer B.Fab))
    (fp_text user %R (at 0 1.9 180) (layer B.Fab))
    (pad 1 smd rect (at -3.4 0 90) (size 3.3 2.5) (layers B.Cu B.Paste B.Mask)
      (net 1 "Net-(C17-Pad1)"))
    (pad 2 smd rect (at 3.4 0 90) (size 3.3 2.5) (layers B.Cu B.Paste B.Mask)
      (net 3 /USB_VCC))
    (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMC.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 5D5C40C8)
    (at 108.7 74.6 90)
    (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x04 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33 90) (layer F.SilkS) hide)
    (fp_text value "USB Connector" (at 3 4.1 180) (layer F.Fab))
    (fp_text user %R (at 0 3.81 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 /USB_VCC))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /USB_D-))
    (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 /USB_D+))
    (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module CustomParts:SAMTEC_FT5-15-01-K-RA-TR (layer F.Cu) (tedit 5CA6D872)
    (at 112.463501 81.895001 180)
    (attr smd)
    (fp_text reference J9 (at -4.96 -4.035 180) (layer F.SilkS) hide)
    (fp_text value FT5-15-01-L-RA-K-TR (at 8.5 -3.6 180) (layer F.SilkS) hide)
    (pad 1 smd rect (at -3.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 6 +3V3))
    (pad 2 smd rect (at -3.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 3 smd rect (at -3 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 4 smd rect (at -3 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 5 smd rect (at -2.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 3 /USB_VCC))
    (pad 6 smd rect (at -2.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 5 /USB_D+))
    (pad 7 smd rect (at -2 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 7 /TRIG))
    (pad 8 smd rect (at -2 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 4 /USB_D-))
    (pad 9 smd rect (at -1.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 8 /L_P))
    (pad 10 smd rect (at -1.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 11 smd rect (at -1 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 9 /W_P))
    (pad 12 smd rect (at -1 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 10 /LINK))
    (pad 13 smd rect (at -0.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 14 smd rect (at -0.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 11 /ACT))
    (pad 15 smd rect (at 0 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 12 /ETH_INT))
    (pad 16 smd rect (at 0 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 17 smd rect (at 0.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 13 /ETH_RST))
    (pad 18 smd rect (at 0.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 14 /MOSI))
    (pad 19 smd rect (at 1 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 15 /OCP))
    (pad 20 smd rect (at 1 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 16 /MISO))
    (pad 21 smd rect (at 1.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 17 /LED_EN))
    (pad 22 smd rect (at 1.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 18 /SCLK))
    (pad 23 smd rect (at 2 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 19 /GPIO0))
    (pad 24 smd rect (at 2 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 20 /SCS))
    (pad 25 smd rect (at 2.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 21 /GPIO1))
    (pad 26 smd rect (at 2.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 27 smd rect (at 3 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 28 smd rect (at 3 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 22 "Net-(J9-Pad28)"))
    (pad 29 smd rect (at 3.5 -0.7355 180) (size 0.3 1.089) (layers F.Cu F.Paste F.Mask)
      (net 23 +5V))
    (pad 30 smd rect (at 3.5 0.69 180) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
      (net 23 +5V))
    (pad Hole np_thru_hole circle (at -7.75 0.1 180) (size 1.45 1.45) (drill 1.45) (layers *.Cu *.Mask F.SilkS))
    (pad Hole np_thru_hole circle (at 7.75 0.1 180) (size 1.45 1.45) (drill 1.45) (layers *.Cu *.Mask F.SilkS))
    (pad P1 thru_hole circle (at -6.5 -1.02 180) (size 1.1 1.1) (drill 0.71) (layers *.Cu *.Mask))
    (pad P3 thru_hole circle (at 6.5 1.23) (size 1.1 1.1) (drill 0.71) (layers *.Cu *.Mask))
    (pad P2 thru_hole circle (at -6.5 1.23 180) (size 1.1 1.1) (drill 0.71) (layers *.Cu *.Mask))
    (pad P4 thru_hole circle (at 6.5 -1.02) (size 1.1 1.1) (drill 0.71) (layers *.Cu *.Mask))
    (model /home/forrest/Documents/KiCad_Folder/KiCad_Libs/3D_Models/FT5-15-01-L-RA-K-TR.stp
      (offset (xyz 0 6.21 0.38))
      (scale (xyz 1 1 1))
      (rotate (xyz 90 180 0))
    )
  )
  (module Package_TO_SOT_SMD:SOT-23-5 (layer B.Cu) (tedit 5D5C40BD)
    (at 115.4 79.4 180)
    (descr "5-pin SOT23 package")
    (tags SOT-23-5)
    (attr smd)
    (fp_text reference U3 (at 0 2.9 180) (layer B.SilkS) hide)
    (fp_text value AP2822AKA (at 0 -2.9 180) (layer B.Fab))
    (fp_text user %R (at 0 0 90) (layer B.Fab))
    (pad 1 smd rect (at -1.1 0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
      (net 1 "Net-(C17-Pad1)"))
    (pad 2 smd rect (at -1.1 0 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 3 smd rect (at -1.1 -0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
      (net 24 "Net-(U3-Pad3)"))
    (pad 4 smd rect (at 1.1 -0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
      (net 1 "Net-(C17-Pad1)"))
    (pad 5 smd rect (at 1.1 0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
      (net 23 +5V))
    (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text D+ (at 114.3 77) (layer F.SilkS))
  (gr_text D- (at 110.8 77.1) (layer F.SilkS))
  (gr_text GND (at 117.3 77) (layer F.SilkS))
  (gr_text 5V (at 105.9 74.8) (layer F.SilkS))
  (gr_line (start 121.6 72.9) (end 121.6 84.1) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 100.3 72.9) (end 121.6 72.9) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 100.3 84.1) (end 100.3 72.9) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 121.6 84.1) (end 100.3 84.1) (layer Edge.Cuts) (width 0.1))
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 100.3 84.1) (xy 100.3 74.1) (xy 99.3 74.1) (xy 99.3 72.9) (xy 121.6 72.9)
        (xy 121.6 84.1)
      )
    )
  )
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 99.3 74.3) (xy 100.3 74.3) (xy 100.3 72.9) (xy 121.6 72.9) (xy 121.6 84.1)
        (xy 100.3 84.1) (xy 100.3 75.3) (xy 99.3 75.3)
      )
    )
  )
)
