(kicad_pcb (version 4) (host pcbnew 4.0.3-stable)
  (general
    (links 56)
    (no_connects 0)
    (area 73.119267 91.8576 131.350734 162.744801)
    (thickness 1.6002)
    (drawings 17)
    (tracks 238)
    (zones 0)
    (modules 20)
    (nets 141)
  )
  (page USLetter)
  (title_block
    (title "BeagleBone RS-232 Cape")
    (date 2016-11-16)
    (rev 1C)
    (company BulbTack)
  )
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.1524)
    (trace_clearance 0.1524)
    (zone_clearance 0.2794)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.762)
    (uvia_drill 0.508)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 4.191 4.191)
    (pad_drill 3.175)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 76.2 76.2)
    (grid_origin 76.2 76.2)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010f0_80000001)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk true)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory export/gerber/))
  )
  (net 0 "")
  (net 1 GNDD)
  (net 2 UART1_TXD)
  (net 3 UART4_TXD)
  (net 4 UART1_RXD)
  (net 5 UART4_RXD)
  (net 6 UART2_TXD)
  (net 7 UART5_TXD)
  (net 8 UART2_RXD)
  (net 9 UART5_RXD)
  (net 10 SER1_RX)
  (net 11 SER1_TX)
  (net 12 SER2_RX)
  (net 13 SER2_TX)
  (net 14 SER4_RX)
  (net 15 SER4_TX)
  (net 16 SER5_RX)
  (net 17 SER5_TX)
  (net 18 +5VD)
  (net 19 /C2_PLUS_1)
  (net 20 /C2_MINUS_1)
  (net 21 /C2_PLUS_2)
  (net 22 /C2_MINUS_2)
  (net 23 /C1_PLUS_1)
  (net 24 /C1_MINUS_1)
  (net 25 /C1_PLUS_2)
  (net 26 /C1_MINUS_2)
  (net 27 /V_PLUS_1)
  (net 28 /V_PLUS_2)
  (net 29 /V_MINUS_1)
  (net 30 /V_MINUS_2)
  (net 31 /UART0_RXD)
  (net 32 /UART0_TXD)
  (net 33 "Net-(P1-Pad1)")
  (net 34 "Net-(P1-Pad4)")
  (net 35 "Net-(P1-Pad6)")
  (net 36 "Net-(P1-Pad7)")
  (net 37 "Net-(P1-Pad8)")
  (net 38 "Net-(P1-Pad9)")
  (net 39 "Net-(P1-Pad10)")
  (net 40 "Net-(P2-Pad1)")
  (net 41 "Net-(P2-Pad4)")
  (net 42 "Net-(P2-Pad6)")
  (net 43 "Net-(P2-Pad7)")
  (net 44 "Net-(P2-Pad8)")
  (net 45 "Net-(P2-Pad9)")
  (net 46 "Net-(P2-Pad10)")
  (net 47 "Net-(P3-Pad2)")
  (net 48 "Net-(P3-Pad3)")
  (net 49 "Net-(P3-Pad6)")
  (net 50 "Net-(P4-Pad1)")
  (net 51 "Net-(P4-Pad4)")
  (net 52 "Net-(P4-Pad6)")
  (net 53 "Net-(P4-Pad7)")
  (net 54 "Net-(P4-Pad8)")
  (net 55 "Net-(P4-Pad9)")
  (net 56 "Net-(P4-Pad10)")
  (net 57 "Net-(P5-Pad1)")
  (net 58 "Net-(P5-Pad4)")
  (net 59 "Net-(P5-Pad6)")
  (net 60 "Net-(P5-Pad7)")
  (net 61 "Net-(P5-Pad8)")
  (net 62 "Net-(P5-Pad9)")
  (net 63 "Net-(P5-Pad10)")
  (net 64 "Net-(P8-Pad3)")
  (net 65 "Net-(P8-Pad4)")
  (net 66 "Net-(P8-Pad5)")
  (net 67 "Net-(P8-Pad6)")
  (net 68 "Net-(P8-Pad7)")
  (net 69 "Net-(P8-Pad8)")
  (net 70 "Net-(P8-Pad9)")
  (net 71 "Net-(P8-Pad10)")
  (net 72 "Net-(P8-Pad11)")
  (net 73 "Net-(P8-Pad12)")
  (net 74 "Net-(P8-Pad13)")
  (net 75 "Net-(P8-Pad14)")
  (net 76 "Net-(P8-Pad15)")
  (net 77 "Net-(P8-Pad16)")
  (net 78 "Net-(P8-Pad17)")
  (net 79 "Net-(P8-Pad18)")
  (net 80 "Net-(P8-Pad19)")
  (net 81 "Net-(P8-Pad20)")
  (net 82 "Net-(P8-Pad21)")
  (net 83 "Net-(P8-Pad22)")
  (net 84 "Net-(P8-Pad23)")
  (net 85 "Net-(P8-Pad24)")
  (net 86 "Net-(P8-Pad25)")
  (net 87 "Net-(P8-Pad26)")
  (net 88 "Net-(P8-Pad27)")
  (net 89 "Net-(P8-Pad28)")
  (net 90 "Net-(P8-Pad29)")
  (net 91 "Net-(P8-Pad30)")
  (net 92 "Net-(P8-Pad31)")
  (net 93 "Net-(P8-Pad32)")
  (net 94 "Net-(P8-Pad33)")
  (net 95 "Net-(P8-Pad34)")
  (net 96 "Net-(P8-Pad35)")
  (net 97 "Net-(P8-Pad36)")
  (net 98 "Net-(P8-Pad39)")
  (net 99 "Net-(P8-Pad40)")
  (net 100 "Net-(P8-Pad41)")
  (net 101 "Net-(P8-Pad42)")
  (net 102 "Net-(P8-Pad43)")
  (net 103 "Net-(P8-Pad44)")
  (net 104 "Net-(P8-Pad45)")
  (net 105 "Net-(P8-Pad46)")
  (net 106 "Net-(P9-Pad3)")
  (net 107 "Net-(P9-Pad4)")
  (net 108 "Net-(P9-Pad7)")
  (net 109 "Net-(P9-Pad8)")
  (net 110 "Net-(P9-Pad9)")
  (net 111 "Net-(P9-Pad10)")
  (net 112 "Net-(P9-Pad12)")
  (net 113 "Net-(P9-Pad14)")
  (net 114 "Net-(P9-Pad15)")
  (net 115 "Net-(P9-Pad16)")
  (net 116 "Net-(P9-Pad17)")
  (net 117 "Net-(P9-Pad18)")
  (net 118 "Net-(P9-Pad19)")
  (net 119 "Net-(P9-Pad20)")
  (net 120 "Net-(P9-Pad23)")
  (net 121 "Net-(P9-Pad25)")
  (net 122 "Net-(P9-Pad27)")
  (net 123 "Net-(P9-Pad28)")
  (net 124 "Net-(P9-Pad29)")
  (net 125 "Net-(P9-Pad30)")
  (net 126 "Net-(P9-Pad31)")
  (net 127 "Net-(P9-Pad32)")
  (net 128 "Net-(P9-Pad33)")
  (net 129 "Net-(P9-Pad34)")
  (net 130 "Net-(P9-Pad35)")
  (net 131 "Net-(P9-Pad36)")
  (net 132 "Net-(P9-Pad37)")
  (net 133 "Net-(P9-Pad38)")
  (net 134 "Net-(P9-Pad39)")
  (net 135 "Net-(P9-Pad40)")
  (net 136 "Net-(P9-Pad41)")
  (net 137 "Net-(P9-Pad42)")
  (net 138 "Net-(P6-Pad2)")
  (net 139 "Net-(P6-Pad3)")
  (net 140 "Net-(P6-Pad6)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.762)
    (uvia_drill 0.508)
    (add_net +5VD)
    (add_net /C1_MINUS_1)
    (add_net /C1_MINUS_2)
    (add_net /C1_PLUS_1)
    (add_net /C1_PLUS_2)
    (add_net /C2_MINUS_1)
    (add_net /C2_MINUS_2)
    (add_net /C2_PLUS_1)
    (add_net /C2_PLUS_2)
    (add_net /UART0_RXD)
    (add_net /UART0_TXD)
    (add_net /V_MINUS_1)
    (add_net /V_MINUS_2)
    (add_net /V_PLUS_1)
    (add_net /V_PLUS_2)
    (add_net GNDD)
    (add_net "Net-(P1-Pad1)")
    (add_net "Net-(P1-Pad10)")
    (add_net "Net-(P1-Pad4)")
    (add_net "Net-(P1-Pad6)")
    (add_net "Net-(P1-Pad7)")
    (add_net "Net-(P1-Pad8)")
    (add_net "Net-(P1-Pad9)")
    (add_net "Net-(P2-Pad1)")
    (add_net "Net-(P2-Pad10)")
    (add_net "Net-(P2-Pad4)")
    (add_net "Net-(P2-Pad6)")
    (add_net "Net-(P2-Pad7)")
    (add_net "Net-(P2-Pad8)")
    (add_net "Net-(P2-Pad9)")
    (add_net "Net-(P3-Pad2)")
    (add_net "Net-(P3-Pad3)")
    (add_net "Net-(P3-Pad6)")
    (add_net "Net-(P4-Pad1)")
    (add_net "Net-(P4-Pad10)")
    (add_net "Net-(P4-Pad4)")
    (add_net "Net-(P4-Pad6)")
    (add_net "Net-(P4-Pad7)")
    (add_net "Net-(P4-Pad8)")
    (add_net "Net-(P4-Pad9)")
    (add_net "Net-(P5-Pad1)")
    (add_net "Net-(P5-Pad10)")
    (add_net "Net-(P5-Pad4)")
    (add_net "Net-(P5-Pad6)")
    (add_net "Net-(P5-Pad7)")
    (add_net "Net-(P5-Pad8)")
    (add_net "Net-(P5-Pad9)")
    (add_net "Net-(P6-Pad2)")
    (add_net "Net-(P6-Pad3)")
    (add_net "Net-(P6-Pad6)")
    (add_net "Net-(P8-Pad10)")
    (add_net "Net-(P8-Pad11)")
    (add_net "Net-(P8-Pad12)")
    (add_net "Net-(P8-Pad13)")
    (add_net "Net-(P8-Pad14)")
    (add_net "Net-(P8-Pad15)")
    (add_net "Net-(P8-Pad16)")
    (add_net "Net-(P8-Pad17)")
    (add_net "Net-(P8-Pad18)")
    (add_net "Net-(P8-Pad19)")
    (add_net "Net-(P8-Pad20)")
    (add_net "Net-(P8-Pad21)")
    (add_net "Net-(P8-Pad22)")
    (add_net "Net-(P8-Pad23)")
    (add_net "Net-(P8-Pad24)")
    (add_net "Net-(P8-Pad25)")
    (add_net "Net-(P8-Pad26)")
    (add_net "Net-(P8-Pad27)")
    (add_net "Net-(P8-Pad28)")
    (add_net "Net-(P8-Pad29)")
    (add_net "Net-(P8-Pad3)")
    (add_net "Net-(P8-Pad30)")
    (add_net "Net-(P8-Pad31)")
    (add_net "Net-(P8-Pad32)")
    (add_net "Net-(P8-Pad33)")
    (add_net "Net-(P8-Pad34)")
    (add_net "Net-(P8-Pad35)")
    (add_net "Net-(P8-Pad36)")
    (add_net "Net-(P8-Pad39)")
    (add_net "Net-(P8-Pad4)")
    (add_net "Net-(P8-Pad40)")
    (add_net "Net-(P8-Pad41)")
    (add_net "Net-(P8-Pad42)")
    (add_net "Net-(P8-Pad43)")
    (add_net "Net-(P8-Pad44)")
    (add_net "Net-(P8-Pad45)")
    (add_net "Net-(P8-Pad46)")
    (add_net "Net-(P8-Pad5)")
    (add_net "Net-(P8-Pad6)")
    (add_net "Net-(P8-Pad7)")
    (add_net "Net-(P8-Pad8)")
    (add_net "Net-(P8-Pad9)")
    (add_net "Net-(P9-Pad10)")
    (add_net "Net-(P9-Pad12)")
    (add_net "Net-(P9-Pad14)")
    (add_net "Net-(P9-Pad15)")
    (add_net "Net-(P9-Pad16)")
    (add_net "Net-(P9-Pad17)")
    (add_net "Net-(P9-Pad18)")
    (add_net "Net-(P9-Pad19)")
    (add_net "Net-(P9-Pad20)")
    (add_net "Net-(P9-Pad23)")
    (add_net "Net-(P9-Pad25)")
    (add_net "Net-(P9-Pad27)")
    (add_net "Net-(P9-Pad28)")
    (add_net "Net-(P9-Pad29)")
    (add_net "Net-(P9-Pad3)")
    (add_net "Net-(P9-Pad30)")
    (add_net "Net-(P9-Pad31)")
    (add_net "Net-(P9-Pad32)")
    (add_net "Net-(P9-Pad33)")
    (add_net "Net-(P9-Pad34)")
    (add_net "Net-(P9-Pad35)")
    (add_net "Net-(P9-Pad36)")
    (add_net "Net-(P9-Pad37)")
    (add_net "Net-(P9-Pad38)")
    (add_net "Net-(P9-Pad39)")
    (add_net "Net-(P9-Pad4)")
    (add_net "Net-(P9-Pad40)")
    (add_net "Net-(P9-Pad41)")
    (add_net "Net-(P9-Pad42)")
    (add_net "Net-(P9-Pad7)")
    (add_net "Net-(P9-Pad8)")
    (add_net "Net-(P9-Pad9)")
    (add_net SER1_RX)
    (add_net SER1_TX)
    (add_net SER2_RX)
    (add_net SER2_TX)
    (add_net SER4_RX)
    (add_net SER4_TX)
    (add_net SER5_RX)
    (add_net SER5_TX)
    (add_net UART1_RXD)
    (add_net UART1_TXD)
    (add_net UART2_RXD)
    (add_net UART2_TXD)
    (add_net UART4_RXD)
    (add_net UART4_TXD)
    (add_net UART5_RXD)
    (add_net UART5_TXD)
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 5829602B)
    (at 97.859488 124.279438)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C1 (at 2.089512 -0.073438) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 19 /C2_PLUS_1))
    (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 20 /C2_MINUS_1))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 582AD3A0)
    (at 118.999 125.349)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C2 (at 2.032 -0.127) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 21 /C2_PLUS_2))
    (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 22 /C2_MINUS_2))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58296030)
    (at 97.859488 125.476 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C3 (at -2.089512 0 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 23 /C1_PLUS_1))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 24 /C1_MINUS_1))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58295F6C)
    (at 118.999 126.492 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C4 (at -2.032 0 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 25 /C1_PLUS_2))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 26 /C1_MINUS_2))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 5829604B)
    (at 87.445488 126.184438 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C5 (at 0 1.216438 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58295F7A)
    (at 108.585 127.254 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C6 (at 0 1.27 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58296059)
    (at 97.917 126.873 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C7 (at 0 -1.397 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 27 /V_PLUS_1))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58295F75)
    (at 118.999 127.762 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C8 (at -2.032 0 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 28 /V_PLUS_2))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58296047)
    (at 97.859488 122.882438 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C9 (at -0.057512 1.089438 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 29 /V_MINUS_1))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0402 (layer F.Cu) (tedit 58295F70)
    (at 118.999 123.952 180)
    (descr "Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0402")
    (attr smd)
    (fp_text reference C10 (at -0.381 1.143 180) (layer F.SilkS))
    (fp_text value .1uF (at 0 1.7 180) (layer F.Fab) hide)
    (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)
      (net 30 /V_MINUS_2))
    (model Capacitors_SMD.3dshapes/C_0402.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_2x23 (layer F.Cu) (tedit 58296559)
    (at 126.365 95.885)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P8 (at -2.667 2.54) (layer F.SilkS))
    (fp_text value CONN_02X23 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 64 "Net-(P8-Pad3)"))
    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 65 "Net-(P8-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 66 "Net-(P8-Pad5)"))
    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 67 "Net-(P8-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 68 "Net-(P8-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 69 "Net-(P8-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 70 "Net-(P8-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 71 "Net-(P8-Pad10)"))
    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 72 "Net-(P8-Pad11)"))
    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 73 "Net-(P8-Pad12)"))
    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 74 "Net-(P8-Pad13)"))
    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 75 "Net-(P8-Pad14)"))
    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 76 "Net-(P8-Pad15)"))
    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 77 "Net-(P8-Pad16)"))
    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 78 "Net-(P8-Pad17)"))
    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 79 "Net-(P8-Pad18)"))
    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 80 "Net-(P8-Pad19)"))
    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 81 "Net-(P8-Pad20)"))
    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 82 "Net-(P8-Pad21)"))
    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 83 "Net-(P8-Pad22)"))
    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 84 "Net-(P8-Pad23)"))
    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 85 "Net-(P8-Pad24)"))
    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 86 "Net-(P8-Pad25)"))
    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 87 "Net-(P8-Pad26)"))
    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 88 "Net-(P8-Pad27)"))
    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 89 "Net-(P8-Pad28)"))
    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 90 "Net-(P8-Pad29)"))
    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 91 "Net-(P8-Pad30)"))
    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 92 "Net-(P8-Pad31)"))
    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 93 "Net-(P8-Pad32)"))
    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 94 "Net-(P8-Pad33)"))
    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 95 "Net-(P8-Pad34)"))
    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 96 "Net-(P8-Pad35)"))
    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 97 "Net-(P8-Pad36)"))
    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 UART5_TXD))
    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 9 UART5_RXD))
    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 98 "Net-(P8-Pad39)"))
    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 99 "Net-(P8-Pad40)"))
    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 100 "Net-(P8-Pad41)"))
    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 101 "Net-(P8-Pad42)"))
    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 102 "Net-(P8-Pad43)"))
    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 103 "Net-(P8-Pad44)"))
    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 104 "Net-(P8-Pad45)"))
    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 105 "Net-(P8-Pad46)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_2x23.wrl
      (at (xyz 0.05 -1.1 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_2x23 (layer F.Cu) (tedit 5829655F)
    (at 78.105 95.885)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P9 (at 5.334 2.54) (layer F.SilkS))
    (fp_text value CONN_02X23 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 106 "Net-(P9-Pad3)"))
    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 107 "Net-(P9-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 18 +5VD))
    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 18 +5VD))
    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 108 "Net-(P9-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 109 "Net-(P9-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 110 "Net-(P9-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 111 "Net-(P9-Pad10)"))
    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 UART4_RXD))
    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 112 "Net-(P9-Pad12)"))
    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 UART4_TXD))
    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 113 "Net-(P9-Pad14)"))
    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 114 "Net-(P9-Pad15)"))
    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 115 "Net-(P9-Pad16)"))
    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 116 "Net-(P9-Pad17)"))
    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 117 "Net-(P9-Pad18)"))
    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 118 "Net-(P9-Pad19)"))
    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 119 "Net-(P9-Pad20)"))
    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 UART2_TXD))
    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 8 UART2_RXD))
    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 120 "Net-(P9-Pad23)"))
    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 UART1_TXD))
    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 121 "Net-(P9-Pad25)"))
    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 UART1_RXD))
    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 122 "Net-(P9-Pad27)"))
    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 123 "Net-(P9-Pad28)"))
    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 124 "Net-(P9-Pad29)"))
    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 125 "Net-(P9-Pad30)"))
    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 126 "Net-(P9-Pad31)"))
    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 127 "Net-(P9-Pad32)"))
    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 128 "Net-(P9-Pad33)"))
    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 129 "Net-(P9-Pad34)"))
    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 130 "Net-(P9-Pad35)"))
    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 131 "Net-(P9-Pad36)"))
    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 132 "Net-(P9-Pad37)"))
    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 133 "Net-(P9-Pad38)"))
    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 134 "Net-(P9-Pad39)"))
    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 135 "Net-(P9-Pad40)"))
    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 136 "Net-(P9-Pad41)"))
    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 137 "Net-(P9-Pad42)"))
    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_2x23.wrl
      (at (xyz 0.05 -1.1 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77)
    (at 92.652488 123.887438 180)
    (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U1 (at -3.048 -3.694 180) (layer F.SilkS))
    (fp_text value ST232C (at -0.098 0.011 450) (layer F.Fab))
    (pad 1 smd rect (at -2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 23 /C1_PLUS_1))
    (pad 2 smd rect (at -2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 27 /V_PLUS_1))
    (pad 3 smd rect (at -2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 24 /C1_MINUS_1))
    (pad 4 smd rect (at -2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 19 /C2_PLUS_1))
    (pad 5 smd rect (at -2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 20 /C2_MINUS_1))
    (pad 6 smd rect (at -2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 29 /V_MINUS_1))
    (pad 7 smd rect (at -2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 15 SER4_TX))
    (pad 8 smd rect (at -2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 14 SER4_RX))
    (pad 9 smd rect (at 2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 5 UART4_RXD))
    (pad 10 smd rect (at 2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 UART4_TXD))
    (pad 11 smd rect (at 2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 6 UART2_TXD))
    (pad 12 smd rect (at 2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 UART2_RXD))
    (pad 13 smd rect (at 2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 SER2_RX))
    (pad 14 smd rect (at 2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 13 SER2_TX))
    (pad 15 smd rect (at 2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (pad 16 smd rect (at 2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77)
    (at 113.792 124.979 180)
    (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U2 (at -2.921 -3.672 180) (layer F.SilkS))
    (fp_text value ST232C (at 0.254 0 270) (layer F.Fab))
    (pad 1 smd rect (at -2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 25 /C1_PLUS_2))
    (pad 2 smd rect (at -2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 28 /V_PLUS_2))
    (pad 3 smd rect (at -2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 26 /C1_MINUS_2))
    (pad 4 smd rect (at -2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 21 /C2_PLUS_2))
    (pad 5 smd rect (at -2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 22 /C2_MINUS_2))
    (pad 6 smd rect (at -2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 30 /V_MINUS_2))
    (pad 7 smd rect (at -2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 17 SER5_TX))
    (pad 8 smd rect (at -2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 16 SER5_RX))
    (pad 9 smd rect (at 2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 9 UART5_RXD))
    (pad 10 smd rect (at 2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 7 UART5_TXD))
    (pad 11 smd rect (at 2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 UART1_TXD))
    (pad 12 smd rect (at 2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 4 UART1_RXD))
    (pad 13 smd rect (at 2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 11 SER1_TX))
    (pad 14 smd rect (at 2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 10 SER1_RX))
    (pad 15 smd rect (at 2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 1 GNDD))
    (pad 16 smd rect (at 2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 18 +5VD))
    (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x06 (layer F.Cu) (tedit 582A98A4)
    (at 83.82 118.745)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P3 (at -0.127 15.113) (layer F.SilkS))
    (fp_text value CONN_01X06 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 47 "Net-(P3-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 48 "Net-(P3-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 31 /UART0_RXD))
    (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 32 /UART0_TXD))
    (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 49 "Net-(P3-Pad6)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x06.wrl
      (at (xyz 0 -0.25 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Angled_2x05 (layer F.Cu) (tedit 0)
    (at 98.298 130.7846 270)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P1 (at 0.0254 -2.794 270) (layer F.SilkS))
    (fp_text value CONN_02X05 (at 0 -3.1 270) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 33 "Net-(P1-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 10 SER1_RX))
    (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 11 SER1_TX))
    (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 34 "Net-(P1-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 35 "Net-(P1-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 36 "Net-(P1-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 37 "Net-(P1-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 38 "Net-(P1-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 39 "Net-(P1-Pad10)"))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x05.wrl
      (at (xyz 0.05 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Angled_2x05 (layer F.Cu) (tedit 0)
    (at 108.712 119.38 90)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P2 (at 0 -2.54 90) (layer F.SilkS))
    (fp_text value CONN_02X05 (at 0 -3.1 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 40 "Net-(P2-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 12 SER2_RX))
    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 SER2_TX))
    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 41 "Net-(P2-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 42 "Net-(P2-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 43 "Net-(P2-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 44 "Net-(P2-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 45 "Net-(P2-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 46 "Net-(P2-Pad10)"))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x05.wrl
      (at (xyz 0.05 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Angled_2x05 (layer F.Cu) (tedit 0)
    (at 88.138 119.38 90)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P4 (at 0 12.7 90) (layer F.SilkS))
    (fp_text value CONN_02X05 (at 0 -3.1 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 50 "Net-(P4-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 14 SER4_RX))
    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 SER4_TX))
    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 51 "Net-(P4-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 52 "Net-(P4-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 53 "Net-(P4-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 54 "Net-(P4-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 55 "Net-(P4-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 56 "Net-(P4-Pad10)"))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x05.wrl
      (at (xyz 0.05 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Angled_2x05 (layer F.Cu) (tedit 0)
    (at 118.872 130.7846 270)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P5 (at 0.0254 12.573 270) (layer F.SilkS))
    (fp_text value CONN_02X05 (at 0 -3.1 270) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 57 "Net-(P5-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 16 SER5_RX))
    (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 17 SER5_TX))
    (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 58 "Net-(P5-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GNDD))
    (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 59 "Net-(P5-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 60 "Net-(P5-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 61 "Net-(P5-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 62 "Net-(P5-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 63 "Net-(P5-Pad10)"))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x05.wrl
      (at (xyz 0.05 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module beaglebone-rs232:Pin_Header_Angled_1x06_SMT (layer B.Cu) (tedit 582D2841)
    (at 105.41 151.9174 270)
    (descr "SMT pin header")
    (tags "pin header")
    (fp_text reference P6 (at -0.2794 2.794 270) (layer B.SilkS))
    (fp_text value CONN_01X06 (at 0 3.1 270) (layer B.Fab) hide)
    (pad 1 smd rect (at 0 0 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 1 GNDD))
    (pad 2 smd rect (at 0 -2.54 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 138 "Net-(P6-Pad2)"))
    (pad 3 smd rect (at 0 -5.08 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 139 "Net-(P6-Pad3)"))
    (pad 4 smd rect (at 0 -7.62 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 31 /UART0_RXD))
    (pad 5 smd rect (at 0 -10.16 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 32 /UART0_TXD))
    (pad 6 smd rect (at 0 -12.7 270) (size 2.794 1.2954) (layers B.Cu B.Paste B.Mask)
      (net 140 "Net-(P6-Pad6)"))
  )
  (gr_arc (start 118.11 149.86) (end 130.81 149.86) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 88.9 149.86) (end 88.9 162.56) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 130.175 94.615) (end 130.175 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 124.46 94.615) (end 124.46 95.885) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 123.825 95.885) (end 124.46 95.885) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 125.095 94.615) (end 124.46 94.615) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 82.55 94.615) (end 82.55 95.885) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 83.185 95.885) (end 83.185 96.52) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 81.915 94.615) (end 81.915 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 76.835 94.615) (end 76.2 94.615) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 130.175 93.98) (end 125.095 93.98) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 76.835 93.98) (end 81.915 93.98) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 83.185 96.52) (end 123.825 96.52) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 118.11 162.56) (end 88.9 162.56) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 130.81 94.615) (end 130.81 149.86) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 76.2 94.615) (end 76.2 149.86) (layer Edge.Cuts) (width 0.15))
  (zone (net 1) (net_name GNDD) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.2794))
    (min_thickness 0.1524)
    (fill yes (arc_segments 16) (thermal_gap 0.2794) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 130.81 162.56) (xy 76.2 162.56) (xy 76.2 93.98) (xy 130.81 93.98)
      )
    )
  )
)
