(kicad_pcb (version 20171130) (host pcbnew "(5.1.2)-2")
  (general
    (thickness 1.6)
    (drawings 4)
    (tracks 26)
    (zones 0)
    (modules 4)
    (nets 4)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 2 3)
    (pad_drill 0.8)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(J1-Pad3)")
  (net 2 "Net-(J1-Pad2)")
  (net 3 "Net-(J1-Pad1)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
  )
  (module EndConnectors:TetrisTieEndConnectors (layer F.Cu) (tedit 5D2A8D88)
    (at 106.265 96.52)
    (descr "Wire solder connection")
    (tags connector)
    (attr virtual)
    (fp_text reference J1 (at -0.508 0.508 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x03 (at 3.175 2.54 180) (layer F.Fab))
    (fp_text user %R (at 3.175 0 180) (layer F.Fab))
    (pad 1 thru_hole roundrect (at 1.05 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 thru_hole roundrect (at 3.59 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(J1-Pad2)"))
    (pad 3 thru_hole roundrect (at 6.13 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(J1-Pad3)") (zone_connect 0))
  )
  (module EndConnectors:TetrisTieEndConnectors (layer F.Cu) (tedit 5D2A8D88)
    (at 106.265 88.265)
    (descr "Wire solder connection")
    (tags connector)
    (attr virtual)
    (fp_text reference J1 (at -0.508 0.508 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x03 (at 3.175 2.54 180) (layer F.Fab))
    (fp_text user %R (at 3.175 0 180) (layer F.Fab))
    (pad 1 thru_hole roundrect (at 1.05 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 thru_hole roundrect (at 3.59 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(J1-Pad2)"))
    (pad 3 thru_hole roundrect (at 6.13 0) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(J1-Pad3)") (zone_connect 0))
  )
  (module EndConnectors:TetrisTieEndConnectors (layer F.Cu) (tedit 5D2A8D88)
    (at 103.285 88.265 180)
    (descr "Wire solder connection")
    (tags connector)
    (attr virtual)
    (fp_text reference J1 (at -0.508 0.508 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x03 (at 3.175 2.54 180) (layer F.Fab))
    (fp_text user %R (at 3.175 0 180) (layer F.Fab))
    (pad 3 thru_hole roundrect (at 6.13 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(J1-Pad3)") (zone_connect 0))
    (pad 2 thru_hole roundrect (at 3.59 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(J1-Pad2)"))
    (pad 1 thru_hole roundrect (at 1.05 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 3 "Net-(J1-Pad1)"))
  )
  (module EndConnectors:TetrisTieEndConnectors (layer F.Cu) (tedit 5D2A8D88)
    (at 103.285 96.52 180)
    (descr "Wire solder connection")
    (tags connector)
    (attr virtual)
    (fp_text reference J1 (at -0.508 0.508 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x03 (at 3.175 2.54 180) (layer F.Fab))
    (fp_text user %R (at 3.175 0 180) (layer F.Fab))
    (pad 3 thru_hole roundrect (at 6.13 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(J1-Pad3)") (zone_connect 0))
    (pad 2 thru_hole roundrect (at 3.59 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(J1-Pad2)"))
    (pad 1 thru_hole roundrect (at 1.05 0 180) (size 2 3) (drill 0.8) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 3 "Net-(J1-Pad1)"))
  )
  (gr_line (start 95.504 87.757) (end 113.792 87.757) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 95.504 97.028) (end 95.504 87.757) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 113.792 97.028) (end 95.504 97.028) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 113.792 87.757) (end 113.792 97.028) (layer Edge.Cuts) (width 0.1))
)
