(kicad_pcb (version 20171130) (host pcbnew "(5.0.2)-1")
  (general
    (thickness 1.6002)
    (drawings 3)
    (tracks 59)
    (zones 0)
    (modules 6)
    (nets 21)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (44 Edge.Cuts user)
  )
  (setup
    (last_trace_width 0.3)
    (user_trace_width 0.1524)
    (user_trace_width 0.2)
    (user_trace_width 0.25)
    (user_trace_width 0.3)
    (user_trace_width 0.4)
    (user_trace_width 0.5)
    (user_trace_width 0.6)
    (user_trace_width 0.8)
    (trace_clearance 0.254)
    (zone_clearance 0.1524)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.127)
    (edge_width 0.127)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed no)
    (uvia_min_size 0.508)
    (uvia_min_drill 0.127)
    (pcb_text_width 0.127)
    (pcb_text_size 0.6 0.6)
    (mod_edge_width 0.127)
    (mod_text_size 0.6 0.6)
    (mod_text_width 0.127)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.05)
    (solder_mask_min_width 0.25)
    (pad_to_paste_clearance -0.04)
    (aux_axis_origin 0 0)
    (grid_origin 148.59 105.41)
    (visible_elements 7FFFFF7F)
    (pcbplotparams
      (layerselection 0x3ffff_80000001)
      (usegerberextensions true)
      (usegerberattributes true)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.127000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "CAM/"))
  )
  (net 0 "")
  (net 1 GND)
  (net 2 +5V)
  (net 3 "Net-(J1-Pad1)")
  (net 4 /Anode)
  (net 5 "Net-(J1-Pad3)")
  (net 6 /HV6)
  (net 7 "Net-(J1-Pad5)")
  (net 8 /HV5)
  (net 9 /HV10)
  (net 10 /HV4)
  (net 11 /HV9)
  (net 12 /HV3)
  (net 13 /HV8)
  (net 14 /HV2)
  (net 15 /HV7)
  (net 16 /HV1)
  (net 17 "Net-(J1-Pad15)")
  (net 18 /Din)
  (net 19 "Net-(LED1-Pad2-DO)")
  (net 20 "Net-(NX1-PadA)")
  (net_class Default "Imperial - this is the standard class"
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net +5V)
    (add_net /Anode)
    (add_net /Din)
    (add_net /HV1)
    (add_net /HV10)
    (add_net /HV2)
    (add_net /HV3)
    (add_net /HV4)
    (add_net /HV5)
    (add_net /HV6)
    (add_net /HV7)
    (add_net /HV8)
    (add_net /HV9)
    (add_net GND)
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad15)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(LED1-Pad2-DO)")
    (add_net "Net-(NX1-PadA)")
  )
  (net_class 0.2mm ""
    (clearance 0.2)
    (trace_width 0.2)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
  )
  (net_class Minimal ""
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
  )
  (module mynixies:mynixies-ZIN18 (layer F.Cu) (tedit 200000)
    (at 148.59 105.41)
    (attr virtual)
    (fp_text reference NX1 (at 0 -11.43) (layer F.SilkS))
    (fp_text value ZIN18 (at 0 9.017) (layer F.SilkS))
    (pad A thru_hole oval (at 7.62 -6.35 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 20 "Net-(NX1-PadA)"))
    (pad 9 thru_hole oval (at 7.62 -1.27 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 11 /HV9))
    (pad 8 thru_hole oval (at -7.62 0 270) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 13 /HV8))
    (pad 7 thru_hole oval (at 7.62 3.81 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 15 /HV7))
    (pad 6 thru_hole oval (at -7.62 5.08 270) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 6 /HV6))
    (pad 5 thru_hole oval (at 7.62 6.35 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 8 /HV5))
    (pad 4 thru_hole oval (at -7.62 2.54 270) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 10 /HV4))
    (pad 3 thru_hole oval (at 7.62 1.27 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 12 /HV3))
    (pad 2 thru_hole oval (at -7.62 -2.54 270) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 14 /HV2))
    (pad 1 thru_hole oval (at -7.62 -5.08 270) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 16 /HV1))
    (pad 0 thru_hole oval (at 7.62 -3.81 90) (size 1.9558 3.9116) (drill 1.778 (offset 0 0.9779)) (layers *.Cu *.Mask)
      (net 9 /HV10))
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5AAD8B4D)
    (at 148.59 108.966 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C1 (at 0 -1.5 180) (layer F.SilkS) hide)
    (fp_text value 0.1uF (at 0 -1.524 180) (layer F.SilkS))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 +5V))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_2x09_Pitch2.54mm (layer F.Cu) (tedit 5AAD8B8E)
    (at 158.67 85.41 270)
    (descr "Through hole straight pin header, 2x09, 2.54mm pitch, double rows")
    (tags "Through hole pin header THT 2x09 2.54mm double row")
    (fp_text reference J1 (at 1.27 -2.33 270) (layer F.SilkS) hide)
    (fp_text value Nixie (at 1.27 22.65 270) (layer F.Fab))
    (fp_text user %R (at 1.27 10.16) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /Anode))
    (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 /HV6))
    (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 /HV5))
    (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 /HV10))
    (pad 8 thru_hole oval (at 2.54 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 /HV4))
    (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 /HV9))
    (pad 10 thru_hole oval (at 2.54 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 /HV3))
    (pad 11 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 /HV8))
    (pad 12 thru_hole oval (at 2.54 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 /HV2))
    (pad 13 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 /HV7))
    (pad 14 thru_hole oval (at 2.54 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 /HV1))
    (pad 15 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 "Net-(J1-Pad15)"))
    (pad 16 thru_hole oval (at 2.54 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 /Din))
    (pad 17 thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 GND))
    (pad 18 thru_hole oval (at 2.54 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 +5V))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x09_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module adafruit:adafruit-WS2812B (layer F.Cu) (tedit 5CEC9D39)
    (at 148.53856 105.36154)
    (attr smd)
    (fp_text reference LED1 (at 3.8989 0.4445 -90) (layer F.SilkS) hide)
    (fp_text value WS2812B5050 (at 0 0) (layer F.SilkS) hide)
    (pad 1-VD smd rect (at 2.44856 1.64846 180) (size 1.4986 0.89916) (layers F.Cu F.Paste F.Mask)
      (net 2 +5V))
    (pad 2-DO smd rect (at 2.44856 -1.64846 180) (size 1.4986 0.89916) (layers F.Cu F.Paste F.Mask)
      (net 19 "Net-(LED1-Pad2-DO)"))
    (pad 3-GN smd rect (at -2.44856 -1.64846 180) (size 1.4986 0.89916) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (pad 4-DI smd rect (at -2.44856 1.64846 180) (size 1.4986 0.89916) (layers F.Cu F.Paste F.Mask)
      (net 18 /Din))
  )
  (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 5AAD8BAB)
    (at 159.512 91.186 270)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R1 (at 0 -1.65 270) (layer F.SilkS) hide)
    (fp_text value 4K7 (at 0.127 -2.032 270) (layer F.SilkS))
    (fp_text user %R (at 0 0 270) (layer F.Fab))
    (pad 1 smd rect (at -0.95 0 270) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 4 /Anode))
    (pad 2 smd rect (at 0.95 0 270) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(NX1-PadA)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module logos:mermaid_l (layer B.Cu) (tedit 0)
    (at 153.035 122.301 180)
    (fp_text reference G*** (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value LOGO (at 0.75 0 180) (layer B.SilkS) hide)
  )
  (gr_text "Mill-Max\n8331-0-15-15-18-27-10-0" (at 148.59 91.44) (layer B.SilkS))
  (gr_text "nixies.us\nZIN18" (at 151.892 122.682) (layer B.Mask))
  (gr_circle (center 148.59 105.41) (end 173.59 105.41) (layer Edge.Cuts) (width 0.127))
  (zone (net 1) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.1524))
    (min_thickness 0.254)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508) (smoothing chamfer))
    (polygon
      (pts
        (xy 121.09 77.91) (xy 176.09 77.91) (xy 176.09 132.91) (xy 121.09 132.91)
      )
    )
  )
)
