(kicad_pcb (version 4) (host pcbnew 4.0.5)
  (general
    (links 13)
    (no_connects 0)
    (area 123.695 75.176666 150.443001 95.028733)
    (thickness 1.6)
    (drawings 8)
    (tracks 36)
    (zones 0)
    (modules 10)
    (nets 8)
  )
  (page USLetter)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.254)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.6858)
    (via_drill 0.4)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010f0_80000001)
      (usegerberextensions true)
      (excludeedgelayer false)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "/Users/jimd/Documents/Personal Stuff/Electronics/KiCAD Projects/Bazz Fuzz 2.0/Bazz Fuss 2.0/"))
  )
  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 /IN)
  (net 3 "Net-(C2-Pad1)")
  (net 4 "Net-(C2-Pad2)")
  (net 5 GND)
  (net 6 +9V)
  (net 7 /OUT)
  (net_class Default "This is the default net class."
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6858)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +9V)
    (add_net /IN)
    (add_net /OUT)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C2-Pad1)")
    (add_net "Net-(C2-Pad2)")
  )
  (module Capacitors_ThroughHole:C_Radial_D5_L6_P2.5 (layer F.Cu) (tedit 587CBC7D)
    (at 128.524 83.82 270)
    (descr "Radial Electrolytic Capacitor Diameter 5mm x Length 6mm, Pitch 2.5mm")
    (tags "Electrolytic Capacitor")
    (fp_text reference C1 (at 1.905 -3.429 360) (layer F.SilkS))
    (fp_text value 4.7µF (at 1.25 3.8 270) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0 270) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole circle (at 2.5 0 270) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 /IN))
    (model Capacitors_ThroughHole.3dshapes/C_Radial_D5_L6_P2.5.wrl
      (at (xyz 0.049213 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Capacitors_ThroughHole:C_Disc_D3_P2.5 (layer F.Cu) (tedit 587CBDF8)
    (at 143.764 86.36 90)
    (descr "Capacitor 3mm Disc, Pitch 2.5mm")
    (tags Capacitor)
    (fp_text reference C2 (at -1.524 0 180) (layer F.SilkS))
    (fp_text value 0.22µF (at 1.25 2.5 90) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0 90) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
    (pad 2 thru_hole circle (at 2.5 0 90) (size 1.3 1.3) (drill 0.8001) (layers *.Cu *.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (model Capacitors_ThroughHole.3dshapes/C_Disc_D3_P2.5.wrl
      (at (xyz 0.049213 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Discret:DO-35 (layer F.Cu) (tedit 587CC289)
    (at 136.652 83.82 180)
    (descr "Diode 3 pas")
    (tags "DIODE DEV")
    (fp_text reference D1 (at -2.794 1.27 180) (layer F.SilkS))
    (fp_text value 1N914 (at 0 0 180) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 3.81 0 180) (size 1.4224 1.4224) (drill 0.6096) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole circle (at -3.81 0 180) (size 1.4224 1.4224) (drill 0.6096) (layers *.Cu *.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (model Discret.3dshapes/DO-35.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.3 0.3 0.3))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x02 (layer F.Cu) (tedit 587CBDE2)
    (at 130.048 89.9414 270)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P1 (at -2.286 -1.143 360) (layer F.SilkS))
    (fp_text value CONN_01X02 (at 0 -3.1 270) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0 270) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 /IN))
    (pad 2 thru_hole oval (at 0 2.54 270) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
      (at (xyz 0 -0.05 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x02 (layer F.Cu) (tedit 587CBDD7)
    (at 130.048 80.264 270)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P2 (at 2.286 -1.016 360) (layer F.SilkS))
    (fp_text value CONN_01X02 (at 0 -3.1 270) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0 270) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 +9V))
    (pad 2 thru_hole oval (at 0 2.54 270) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
      (at (xyz 0 -0.05 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x02 (layer F.Cu) (tedit 587CC267)
    (at 138.684 87.376)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P3 (at 2.54 3.81) (layer F.SilkS))
    (fp_text value CONN_01X02 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 /OUT))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
      (at (xyz 0 -0.05 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module TO_SOT_Packages_THT:TO-92_Inline_Narrow_Oval (layer F.Cu) (tedit 587CD36E)
    (at 134.62 90.424 90)
    (descr "TO-92 leads in-line, narrow, oval pads, drill 0.6mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (fp_text reference Q1 (at 4.064 1.27 180) (layer F.SilkS))
    (fp_text value 2N5088 (at 0 3 90) (layer F.Fab) hide)
    (pad 2 thru_hole oval (at 1.27 0 270) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 3 thru_hole oval (at 2.54 0 270) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (pad 1 thru_hole oval (at 0 0 270) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 5 GND))
    (model TO_SOT_Packages_THT.3dshapes/TO-92_Inline_Narrow_Oval.wrl
      (at (xyz 0.05 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )
  (module Resistors_ThroughHole:Resistor_Horizontal_RM10mm (layer F.Cu) (tedit 587CC29A)
    (at 133.604 80.264)
    (descr "Resistor, Axial,  RM 10mm, 1/3W")
    (tags "Resistor Axial RM 10mm 1/3W")
    (fp_text reference R1 (at 1.778 1.524) (layer F.SilkS))
    (fp_text value 100K (at 5.08 3.81) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 6 +9V))
    (pad 2 thru_hole circle (at 10.16 0) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 4 "Net-(C2-Pad2)"))
    (model Resistors_ThroughHole.3dshapes/Resistor_Horizontal_RM10mm.wrl
      (at (xyz 0.2 0 0))
      (scale (xyz 0.4 0.4 0.4))
      (rotate (xyz 0 0 0))
    )
  )
  (module MyFootprints:Potentiometer_largePads (layer F.Cu) (tedit 587D770E)
    (at 147.828 90.17 180)
    (descr "Potentiometer, Large Pads")
    (tags "Potentiometer, Large Pads")
    (fp_text reference RV1 (at 3.429 -1.397 180) (layer F.SilkS))
    (fp_text value 10K (at 0 12.446 180) (layer F.Fab) hide)
    (pad 2 thru_hole oval (at 0 5.00126 180) (size 4.0005 2.99974) (drill 1.39954) (layers *.Cu *.Mask)
      (net 7 /OUT))
    (pad 3 thru_hole oval (at 0 10.00252 180) (size 4.0005 2.99974) (drill 1.39954) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 1 thru_hole oval (at 0 0 180) (size 4.0005 2.99974) (drill 1.39954) (layers *.Cu *.Mask)
      (net 3 "Net-(C2-Pad1)"))
  )
  (module Graphics:BrainMicro (layer B.Cu) (tedit 0)
    (at 136.652 83.82 180)
    (fp_text reference G*** (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value LOGO (at 0.75 0 180) (layer B.SilkS) hide)
  )
  (gr_text "For Brainy" (at 133.858 86.106) (layer B.SilkS))
  (gr_text BOT (at 143.002 89.662) (layer B.Cu))
  (gr_text TOP (at 143.002 89.662) (layer F.Cu))
  (gr_text "Grey Matter Fuzz\nPCB v2.0\n01/2017" (at 138.684 80.264) (layer B.SilkS))
  (gr_line (start 125.476 92.202) (end 125.476 78.232) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 150.368 92.202) (end 125.476 92.202) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 150.368 78.232) (end 150.368 92.202) (angle 90) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 125.476 78.232) (end 150.368 78.232) (angle 90) (layer Edge.Cuts) (width 0.1))
  (zone (net 5) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 150.114 91.948) (xy 125.73 91.948) (xy 125.73 78.486) (xy 150.114 78.486)
      )
    )
  )
)
