(kicad_pcb (version 4) (host pcbnew 4.0.4+e1-6308~48~ubuntu16.04.1-stable)
  (general
    (links 27)
    (no_connects 0)
    (area 97.713799 61.4426 178.510001 123.265001)
    (thickness 1.6)
    (drawings 42)
    (tracks 96)
    (zones 0)
    (modules 8)
    (nets 12)
  )
  (page USLetter)
  (title_block
    (title "Full-size SD Connector (2041021-4) Breakout Board")
    (date "01 Jan 2017")
    (rev v1.0)
    (company "CERN Open Hardware License v1.2")
    (comment 1 jenner@wickerbox.net)
    (comment 2 http://wickerbox.net)
    (comment 3 "Wickerbox Electronics")
  )
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (44 Edge.Cuts user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.254)
    (user_trace_width 0.1524)
    (user_trace_width 0.254)
    (user_trace_width 0.3302)
    (user_trace_width 0.508)
    (user_trace_width 0.762)
    (user_trace_width 1.27)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.1524)
    (edge_width 0.1524)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (user_via 0.6858 0.3302)
    (user_via 0.762 0.4064)
    (user_via 0.8636 0.508)
    (uvia_size 0.6858)
    (uvia_drill 0.3302)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.1524)
    (pcb_text_size 1.016 1.016)
    (mod_edge_width 0.1524)
    (mod_text_size 1.016 1.016)
    (mod_text_width 0.1524)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.0762)
    (solder_mask_min_width 0.1016)
    (pad_to_paste_clearance -0.0762)
    (aux_axis_origin 0 0)
    (visible_elements FFFEDF7D)
    (pcbplotparams
      (layerselection 0x310fc_80000001)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory gerbers))
  )
  (net 0 "")
  (net 1 VIN)
  (net 2 GND)
  (net 3 +3V3)
  (net 4 /CS)
  (net 5 /MOSI)
  (net 6 /MISO)
  (net 7 /SD_CS)
  (net 8 /SD_MOSI)
  (net 9 /SD_SCLK)
  (net 10 /SD_MISO)
  (net 11 /SCLK)
  (net_class Default "This is the default net class."
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.6858)
    (uvia_drill 0.3302)
    (add_net +3V3)
    (add_net /CS)
    (add_net /MISO)
    (add_net /MOSI)
    (add_net /SCLK)
    (add_net /SD_CS)
    (add_net /SD_MISO)
    (add_net /SD_MOSI)
    (add_net /SD_SCLK)
    (add_net GND)
    (add_net VIN)
  )
  (module Wickerlib:RLC-0603-SMD (layer F.Cu) (tedit 579029AB)
    (at 107.442 86.602 270)
    (descr "Capacitor SMD RLC-0603-SMD, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor RLC-0603-SMD")
    (attr smd)
    (fp_text reference C1 (at 0.09 0.04 270) (layer F.Fab))
    (fp_text value 1uF (at 0 1.9 270) (layer F.Fab) hide)
    (fp_text user %R (at 2.425 -0.127 360) (layer F.SilkS))
    (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 VIN))
    (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
  )
  (module Wickerlib:RLC-0603-SMD (layer F.Cu) (tedit 579029AB)
    (at 107.708 81.788)
    (descr "Capacitor SMD RLC-0603-SMD, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor RLC-0603-SMD")
    (attr smd)
    (fp_text reference C2 (at 0.09 0.04) (layer F.Fab))
    (fp_text value 0.1uF (at 0 1.9) (layer F.Fab) hide)
    (fp_text user %R (at 2.782 0) (layer F.SilkS))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 VIN))
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
  )
  (module Wickerlib:RLC-0603-SMD (layer F.Cu) (tedit 579029AB)
    (at 107.708 70.612)
    (descr "Capacitor SMD RLC-0603-SMD, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor RLC-0603-SMD")
    (attr smd)
    (fp_text reference C3 (at 0.09 0.04) (layer F.Fab))
    (fp_text value 0.1uF (at 0 1.9) (layer F.Fab) hide)
    (fp_text user %R (at 2.655 0) (layer F.SilkS))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
  )
  (module Wickerlib:RLC-0603-SMD (layer F.Cu) (tedit 579029AB)
    (at 112.776 86.614 90)
    (descr "Capacitor SMD RLC-0603-SMD, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor RLC-0603-SMD")
    (attr smd)
    (fp_text reference C4 (at 0.09 0.04 90) (layer F.Fab))
    (fp_text value 1uF (at 0 1.9 90) (layer F.Fab) hide)
    (fp_text user %R (at -2.413 0 180) (layer F.SilkS))
    (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
  )
  (module Wickerlib:CONN-HEADER-STRAIGHT-P2.54MM-1x06 (layer F.Cu) (tedit 586D9D01)
    (at 100.076 86.36 180)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference J1 (at -0.01 6.35 270) (layer F.Fab))
    (fp_text value BREAKOUT (at -2.63 6.86 270) (layer F.Fab) hide)
    (fp_text user %R (at 0.14 -2.74 180) (layer F.SilkS) hide)
    (pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 1 VIN))
    (pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 6 /MISO))
    (pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 11 /SCLK))
    (pad 4 thru_hole oval (at 0 7.62 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 5 /MOSI))
    (pad 5 thru_hole oval (at 0 10.16 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 4 /CS))
    (pad 6 thru_hole oval (at 0 12.7 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 2 GND))
  )
  (module Wickerlib:CONN-SD-FULL-TECONN-2041021-4 (layer F.Cu) (tedit 585ECC60)
    (at 116.072 78.162 90)
    (fp_text reference J2 (at 0 12.7 90) (layer F.Fab))
    (fp_text value "TE CONN 2041021-4" (at -1.2 9 90) (layer F.Fab) hide)
    (fp_text user %R (at -12.897 -2.153 90) (layer F.SilkS))
    (pad 1 smd rect (at 6.875 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 7 /SD_CS))
    (pad 2 smd rect (at 4.375 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 8 /SD_MOSI))
    (pad 3 smd rect (at 1.875 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 4 smd rect (at -0.625 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 5 smd rect (at -3.125 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 9 /SD_SCLK))
    (pad 6 smd rect (at -5.625 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 7 smd rect (at -8.055 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask)
      (net 10 /SD_MISO))
    (pad 8 smd rect (at -9.755 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask))
    (pad 9 smd rect (at 9.375 0 90) (size 1 1.5) (layers F.Cu F.Paste F.Mask))
    (pad 10 smd rect (at -11.055 0 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask))
    (pad 11 smd rect (at -12.255 0 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask))
    (pad "" np_thru_hole circle (at 9.5 2.8 90) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask))
    (pad "" np_thru_hole circle (at -11.5 2.8 90) (size 1.1 1.1) (drill 1.1) (layers *.Cu *.Mask))
    (pad 12 smd rect (at 11.45 1.8 90) (size 1.5 2.8) (layers F.Cu F.Paste F.Mask))
    (pad 13 smd rect (at 13.65 23.3 90) (size 1.5 2.8) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 14 smd rect (at -13.65 23.3 90) (size 1.5 2.8) (layers F.Cu F.Paste F.Mask))
    (pad 15 smd rect (at -13.65 1.8 90) (size 1.5 2.8) (layers F.Cu F.Paste F.Mask))
  )
  (module Wickerlib:SOT-353 (layer F.Cu) (tedit 586C4D4B)
    (at 109.982 86.68 270)
    (descr SOT353)
    (attr smd)
    (fp_text reference U1 (at 0 0 270) (layer F.Fab))
    (fp_text value "MIC5365 150mA" (at 0 2.25 270) (layer F.Fab) hide)
    (fp_text user %R (at -2.352 0 360) (layer F.SilkS))
    (pad 1 smd rect (at -0.95 -0.65 270) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)
      (net 1 VIN))
    (pad 3 smd rect (at -0.95 0.65 270) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)
      (net 1 VIN))
    (pad 5 smd rect (at 0.95 -0.65 270) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 2 smd rect (at -0.95 0 270) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 4 smd rect (at 0.95 0.65 270) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask))
    (model TO_SOT_Packages_SMD.3dshapes/SOT-353.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.07000000000000001 0.09 0.08))
      (rotate (xyz 0 0 90))
    )
  )
  (module Wickerlib:SOIC-14-3.9x8.7MM-P1.27MM (layer F.Cu) (tedit 58157842)
    (at 110.142 76.2 180)
    (descr "14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U2 (at 0 0.1 270) (layer F.Fab))
    (fp_text value TXB0104 (at 0 5.375 180) (layer F.Fab) hide)
    (fp_text user %R (at -2.888 -5.588 180) (layer F.SilkS))
    (pad 1 smd rect (at -2.7 -3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 2 smd rect (at -2.7 -2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 /SD_MISO))
    (pad 3 smd rect (at -2.7 -1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 /SD_SCLK))
    (pad 4 smd rect (at -2.7 0 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 /SD_MOSI))
    (pad 5 smd rect (at -2.7 1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 /SD_CS))
    (pad 6 smd rect (at -2.7 2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 7 smd rect (at -2.7 3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 8 smd rect (at 2.7 3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 +3V3))
    (pad 9 smd rect (at 2.7 2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask))
    (pad 10 smd rect (at 2.7 1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 /CS))
    (pad 11 smd rect (at 2.7 0 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 /MOSI))
    (pad 12 smd rect (at 2.7 -1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 /SCLK))
    (pad 13 smd rect (at 2.7 -2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 /MISO))
    (pad 14 smd rect (at 2.7 -3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VIN))
  )
  (gr_text 1/4/17 (at 139.7 93.98) (layer F.Fab))
  (gr_text "SD Card Breakout Board v1.0" (at 130.81 62.23) (layer F.Fab))
  (gr_line (start 142.24 91.44) (end 142.24 64.77) (layer Edge.Cuts) (width 0.1524))
  (gr_arc (start 140.97 91.44) (end 142.24 91.44) (angle 90) (layer Edge.Cuts) (width 0.1524))
  (gr_arc (start 140.97 64.77) (end 140.97 63.5) (angle 90) (layer Edge.Cuts) (width 0.1524))
  (gr_line (start 100.33 63.5) (end 140.97 63.5) (layer Edge.Cuts) (width 0.1524))
  (gr_line (start 100.33 92.71) (end 140.97 92.71) (layer Edge.Cuts) (width 0.1524))
  (gr_arc (start 100.33 90.17) (end 100.33 92.71) (angle 89.9) (layer Edge.Cuts) (width 0.1524))
  (gr_line (start 97.79 66.04) (end 97.79 90.17) (layer Edge.Cuts) (width 0.1524))
  (gr_arc (start 100.33 66.04) (end 97.79 66.04) (angle 89.9) (layer Edge.Cuts) (width 0.1524))
  (gr_text "Full-size SD Card Breakout\n\nSD Connector:\nTE CONN P/N 2041021-4\n\nVIN can be 5V or 3.3V\n\nwickerbox.net" (at 130.429 78.105 270) (layer B.SilkS))
  (gr_text VIN (at 102.930477 86.36) (layer F.SilkS))
  (gr_text MISO (at 103.559429 83.82) (layer F.SilkS))
  (gr_text SCLK (at 103.632 81.28) (layer F.SilkS))
  (gr_text MOSI (at 103.559429 78.74) (layer F.SilkS))
  (gr_text CS (at 102.712762 76.2) (layer F.SilkS))
  (gr_text GND (at 103.269143 73.66) (layer F.SilkS))
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 142.24 63.5) (xy 97.79 63.5) (xy 97.79 92.71) (xy 142.24 92.71)
      )
    )
  )
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 142.24 63.5) (xy 97.79 63.5) (xy 97.79 92.71) (xy 142.24 92.71)
      )
    )
  )
)
