(kicad_pcb (version 4) (host pcbnew 4.0.6-e0-6349~52~ubuntu16.10.1)
  (general
    (links 10)
    (no_connects 0)
    (area 144.704999 104.064999 155.015001 121.360001)
    (thickness 1.6)
    (drawings 7)
    (tracks 10)
    (zones 0)
    (modules 2)
    (nets 6)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.5)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.55 1.55)
    (pad_drill 1.2)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 +5V)
  (net 2 "Net-(J1-Pad2)")
  (net 3 "Net-(J1-Pad3)")
  (net 4 "Net-(J1-Pad4)")
  (net 5 GND)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +5V)
    (add_net GND)
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad4)")
  )
  (module Pin_Headers:Pin_Header_Straight_2x03_Pitch2.54mm (layer F.Cu) (tedit 596EA0B9)
    (at 148.5011 106.68)
    (descr "Through hole straight pin header, 2x03, 2.54mm pitch, double rows")
    (tags "Through hole pin header THT 2x03 2.54mm double row")
    (fp_text reference J2 (at 1.27 -2.33) (layer F.SilkS) hide)
    (fp_text value CONN_02X03 (at 1.27 7.41) (layer F.Fab) hide)
    (fp_text user %R (at 1.27 2.54 90) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 GND))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x03_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module bb-usb-buddy:USB_Micro-B (layer F.Cu) (tedit 597016E3)
    (at 149.86 118.03)
    (descr "Micro USB Type B Receptacle")
    (tags "USB USB_B USB_micro USB_OTG")
    (attr smd)
    (fp_text reference J1 (at 0 -3.24) (layer F.SilkS) hide)
    (fp_text value USB_OTG (at 0 5.01 90) (layer F.Fab) hide)
    (pad 1 smd rect (at -1.3 -1.35 90) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at -0.65 -1.35 90) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(J1-Pad2)"))
    (pad 3 smd rect (at 0 -1.35 90) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(J1-Pad3)"))
    (pad 4 smd rect (at 0.65 -1.35 90) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(J1-Pad4)"))
    (pad 5 smd rect (at 1.3 -1.35 90) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
      (net 5 GND))
    (pad 6 thru_hole circle (at -3.5 1.35 90) (size 1.55 1.55) (drill 1.2) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 6 thru_hole circle (at 3.5 1.35 90) (size 1.55 1.55) (drill 1.2) (layers *.Cu *.Mask)
      (net 5 GND))
    (pad 6 smd rect (at -3.3 -1.15) (size 1.4 1.4) (layers F.Cu F.Paste F.Mask)
      (net 5 GND) (solder_mask_margin 0.1))
    (pad 6 smd rect (at 3.3 -1.15) (size 1.4 1.4) (layers F.Cu F.Paste F.Mask)
      (net 5 GND) (solder_mask_margin 0.1))
  )
  (gr_text "++++\n" (at 146.1262 111.3536 90) (layer B.SilkS))
  (gr_text "++++\n" (at 146.1262 111.3536 90) (layer F.SilkS))
  (gr_arc (start 149.86 109.22) (end 149.86 104.14) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 149.86 109.22) (end 144.78 109.22) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 154.94 121.285) (end 154.94 109.22) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 144.78 121.285) (end 154.94 121.285) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 144.78 109.22) (end 144.78 121.285) (layer Edge.Cuts) (width 0.15))
  (zone (net 5) (net_name GND) (layer F.Cu) (hatch none 0.508)
    (connect_pads (clearance 0.5))
    (min_thickness 0.254)
    (fill yes (arc_segments 32) (thermal_gap 0.25) (thermal_bridge_width 0.4))
    (polygon
      (pts
        (xy 144.145 121.285) (xy 155.575 121.285) (xy 155.575 103.505) (xy 144.145 103.505)
      )
    )
  )
)
