(kicad_pcb (version 20171130) (host pcbnew "(5.0.1-3-g963ef8bb5)")
  (general
    (thickness 1.6)
    (drawings 39)
    (tracks 106)
    (zones 0)
    (modules 9)
    (nets 21)
  )
  (page USLetter)
  (layers
    (0 F.Cu mixed)
    (31 B.Cu mixed)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user hide)
  )
  (setup
    (last_trace_width 0.2032)
    (user_trace_width 0.3048)
    (user_trace_width 0.508)
    (user_trace_width 0.8128)
    (trace_clearance 0.2032)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1778)
    (segment_width 0.2)
    (edge_width 0.0254)
    (via_size 0.6096)
    (via_drill 0.3048)
    (via_min_size 0.6096)
    (via_min_drill 0.3048)
    (user_via 0.762 0.4064)
    (user_via 0.9144 0.508)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.0254)
    (solder_mask_min_width 0.1016)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.076200)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 GND)
  (net 2 VDD)
  (net 3 PIO_16)
  (net 4 PIO_10)
  (net 5 PIO_11)
  (net 6 PIO_2)
  (net 7 PIO_3)
  (net 8 PIO_4.TX)
  (net 9 PIO_5.NRST)
  (net 10 PIO_12.ISP)
  (net 11 PIO_13)
  (net 12 PIO_17)
  (net 13 PIO_15)
  (net 14 PIO_1)
  (net 15 PIO_9)
  (net 16 PIO_8)
  (net 17 PIO_7)
  (net 18 PIO_6)
  (net 19 PIO_0.RX)
  (net 20 PIO_14)
  (net_class Default "This is the default net class."
    (clearance 0.2032)
    (trace_width 0.2032)
    (via_dia 0.6096)
    (via_drill 0.3048)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (diff_pair_gap 0.1524)
    (diff_pair_width 0.2032)
    (add_net GND)
    (add_net PIO_0.RX)
    (add_net PIO_1)
    (add_net PIO_10)
    (add_net PIO_11)
    (add_net PIO_12.ISP)
    (add_net PIO_13)
    (add_net PIO_14)
    (add_net PIO_15)
    (add_net PIO_16)
    (add_net PIO_17)
    (add_net PIO_2)
    (add_net PIO_3)
    (add_net PIO_4.TX)
    (add_net PIO_5.NRST)
    (add_net PIO_6)
    (add_net PIO_7)
    (add_net PIO_8)
    (add_net PIO_9)
    (add_net VDD)
  )
  (module local_footprints:Pin_Header_Straight_1x10_Pitch2.54mm_NoSilk (layer F.Cu) (tedit 5C875240)
    (at 127 114.3 90)
    (descr "Through hole straight pin header, 1x10, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x10 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33 90) (layer F.SilkS) hide)
    (fp_text value Conn_01x10 (at 0 25.19 90) (layer F.Fab))
    (fp_text user %R (at 0 11.43 180) (layer F.Fab))
    (pad 1 thru_hole roundrect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 12 PIO_17))
    (pad 2 thru_hole roundrect (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 11 PIO_13))
    (pad 3 thru_hole roundrect (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 10 PIO_12.ISP))
    (pad 4 thru_hole roundrect (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 9 PIO_5.NRST))
    (pad 5 thru_hole roundrect (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 8 PIO_4.TX))
    (pad 6 thru_hole roundrect (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 7 PIO_3))
    (pad 7 thru_hole roundrect (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 6 PIO_2))
    (pad 8 thru_hole roundrect (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 5 PIO_11))
    (pad 9 thru_hole roundrect (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 4 PIO_10))
    (pad 10 thru_hole roundrect (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 3 PIO_16))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x10_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:Pin_Header_Straight_1x10_Pitch2.54mm_NoSilk (layer F.Cu) (tedit 5C875240)
    (at 149.86 93.98 270)
    (descr "Through hole straight pin header, 1x10, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x10 2.54mm single row")
    (fp_text reference J2 (at 0 -2.33 270) (layer F.SilkS) hide)
    (fp_text value Conn_01x10 (at 0 25.19 270) (layer F.Fab))
    (fp_text user %R (at 0 11.43) (layer F.Fab))
    (pad 1 thru_hole roundrect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 13 PIO_15))
    (pad 2 thru_hole roundrect (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 14 PIO_1))
    (pad 3 thru_hole roundrect (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 15 PIO_9))
    (pad 4 thru_hole roundrect (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 16 PIO_8))
    (pad 5 thru_hole roundrect (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 VDD))
    (pad 6 thru_hole roundrect (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 1 GND))
    (pad 7 thru_hole roundrect (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 17 PIO_7))
    (pad 8 thru_hole roundrect (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 18 PIO_6))
    (pad 9 thru_hole roundrect (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 19 PIO_0.RX))
    (pad 10 thru_hole roundrect (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 20 PIO_14))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x10_Pitch2.54mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:0805_HS (layer F.Cu) (tedit 5C0C83D5)
    (at 138.4 97.4 180)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference C1 (at 0 0 270) (layer F.SilkS))
    (fp_text value 0.1uF (at 0 1.75 180) (layer F.Fab) hide)
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 2 smd roundrect (at 1.15 0 180) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 GND))
    (pad 1 smd roundrect (at -1.15 0 180) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 VDD))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:SW_SPST_PUSH_6mm_3mm (layer F.Cu) (tedit 5C735BCC)
    (at 149.86 104.14 270)
    (descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English)
    (tags "SPST button tactile switch")
    (attr smd)
    (fp_text reference SW1 (at 0 0 270) (layer F.SilkS))
    (fp_text value RESET (at 0 3 270) (layer F.Fab))
    (fp_text user %R (at 0 -2.6 270) (layer F.Fab))
    (pad 1 smd roundrect (at -3.9 0 270) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 GND))
    (pad 2 smd roundrect (at 3.9 0 270) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 9 PIO_5.NRST))
    (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:SW_SPST_PUSH_6mm_3mm (layer F.Cu) (tedit 5C735BCC)
    (at 127 104.14 90)
    (descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English)
    (tags "SPST button tactile switch")
    (attr smd)
    (fp_text reference SW2 (at 0 0 90) (layer F.SilkS))
    (fp_text value ISP (at 0 3 90) (layer F.Fab))
    (fp_text user %R (at 0 -2.6 90) (layer F.Fab))
    (pad 2 smd roundrect (at 3.9 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 GND))
    (pad 1 smd roundrect (at -3.9 0 90) (size 2 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 10 PIO_12.ISP))
    (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:SOIC-20W_7.5x12.8mm_Pitch1.27mm_HS (layer F.Cu) (tedit 5C85F656)
    (at 138.4 105.2 90)
    (descr "20-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U1 (at 0.1 -0.1 180) (layer F.SilkS))
    (fp_text value LPC812M101JD20 (at 0 7.5 90) (layer F.Fab))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 20 smd roundrect (at 4.85 -5.715 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 20 PIO_14))
    (pad 19 smd roundrect (at 4.85 -4.445 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 19 PIO_0.RX))
    (pad 18 smd roundrect (at 4.85 -3.175 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 18 PIO_6))
    (pad 17 smd roundrect (at 4.85 -1.905 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 17 PIO_7))
    (pad 16 smd roundrect (at 4.85 -0.635 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 GND))
    (pad 15 smd roundrect (at 4.85 0.635 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 VDD))
    (pad 14 smd roundrect (at 4.85 1.905 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 16 PIO_8))
    (pad 13 smd roundrect (at 4.85 3.175 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 15 PIO_9))
    (pad 12 smd roundrect (at 4.85 4.445 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 14 PIO_1))
    (pad 11 smd roundrect (at 4.85 5.715 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 13 PIO_15))
    (pad 10 smd roundrect (at -4.85 5.715 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 PIO_16))
    (pad 9 smd roundrect (at -4.85 4.445 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 PIO_10))
    (pad 8 smd roundrect (at -4.85 3.175 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 5 PIO_11))
    (pad 7 smd roundrect (at -4.85 1.905 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 6 PIO_2))
    (pad 6 smd roundrect (at -4.85 0.635 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 7 PIO_3))
    (pad 5 smd roundrect (at -4.85 -0.635 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 8 PIO_4.TX))
    (pad 4 smd roundrect (at -4.85 -1.905 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 9 PIO_5.NRST))
    (pad 3 smd roundrect (at -4.85 -3.175 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 10 PIO_12.ISP))
    (pad 2 smd roundrect (at -4.85 -4.445 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 11 PIO_13))
    (pad 1 smd roundrect (at -4.85 -5.715 90) (size 2.25 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 12 PIO_17))
    (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-20W_7.5x12.8mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:0805_HS (layer F.Cu) (tedit 5C0C83D5)
    (at 146.685 104.14 270)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R1 (at 0 0) (layer F.SilkS))
    (fp_text value R (at 0 1.75 270) (layer F.Fab) hide)
    (fp_text user %R (at 0 0 270) (layer F.Fab))
    (pad 1 smd roundrect (at -1.15 0 270) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 VDD))
    (pad 2 smd roundrect (at 1.15 0 270) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 9 PIO_5.NRST))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module local_footprints:0805_HS (layer F.Cu) (tedit 5C0C83D5)
    (at 130.175 104.14 270)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R2 (at 0 0) (layer F.SilkS))
    (fp_text value R (at 0 1.75 270) (layer F.Fab) hide)
    (fp_text user %R (at 0 0 270) (layer F.Fab))
    (pad 2 smd roundrect (at 1.15 0 270) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 10 PIO_12.ISP))
    (pad 1 smd roundrect (at -1.15 0 270) (size 1.1 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 VDD))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Symbols:OSHW-Logo_5.7x6mm_SilkScreen (layer B.Cu) (tedit 0)
    (at 145.542 105.156 180)
    (descr "Open Source Hardware Logo")
    (tags "Logo OSHW")
    (attr virtual)
    (fp_text reference REF*** (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value OSHW-Logo_5.7x6mm_SilkScreen (at 0.75 0 180) (layer B.Fab) hide)
  )
  (gr_text "Flash: 16KB\nRAM: 4KB\nCortex-M0+" (at 135.89 98.806) (layer B.SilkS))
  (gr_text NOTES: (at 140.335 101.6) (layer B.SilkS))
  (gr_text "(C) Vlad Belous\nCC BY-SA 4.0\ngithub.com/vladbelous/lpc812-breakout" (at 150.495 110.744) (layer B.SilkS))
  (gr_text "Simple breakout for\nLPC812M101JD20FP\n\nVIN: 1.8 ~~ 3.6V" (at 150.368 99.314) (layer B.SilkS))
  (gr_text ISP (at 129.54 108.204) (layer F.SilkS))
  (gr_text RESET (at 147.066 108.204) (layer F.SilkS))
  (gr_text P14 (at 127 95.885) (layer F.SilkS))
  (gr_text "P0\nRXD" (at 129.54 95.885) (layer F.SilkS))
  (gr_text P6 (at 132.08 95.885) (layer F.SilkS))
  (gr_text P7 (at 134.62 95.885) (layer F.SilkS))
  (gr_text GND (at 137.16 95.885) (layer F.SilkS))
  (gr_text VDD (at 139.7 95.885) (layer F.SilkS))
  (gr_text P8 (at 142.24 95.885) (layer F.SilkS))
  (gr_text P9 (at 144.78 95.885) (layer F.SilkS))
  (gr_text P1 (at 147.32 95.885) (layer F.SilkS))
  (gr_text P15 (at 149.86 95.885) (layer F.SilkS))
  (gr_text P16 (at 149.86 112.395) (layer F.SilkS))
  (gr_text P10 (at 147.32 112.395) (layer F.SilkS))
  (gr_text P11 (at 144.78 112.395) (layer F.SilkS))
  (gr_text P2 (at 142.24 112.395) (layer F.SilkS))
  (gr_text P3 (at 139.7 112.395) (layer F.SilkS))
  (gr_text "P4\nTXD" (at 137.16 112.395) (layer F.SilkS))
  (gr_text "P5\nNRST" (at 134.62 112.395) (layer F.SilkS))
  (gr_text "P12\nISP" (at 132.08 112.395) (layer F.SilkS))
  (gr_text P13 (at 129.54 112.395) (layer F.SilkS))
  (gr_text P17 (at 127 112.395) (layer F.SilkS))
  (dimension 27.94 (width 0.3) (layer Dwgs.User)
    (gr_text "1.1000 in" (at 138.43 132.91) (layer Dwgs.User))
    (feature1 (pts (xy 152.4 129.54) (xy 152.4 131.396421)))
    (feature2 (pts (xy 124.46 129.54) (xy 124.46 131.396421)))
    (crossbar (pts (xy 124.46 130.81) (xy 152.4 130.81)))
    (arrow1a (pts (xy 152.4 130.81) (xy 151.273496 131.396421)))
    (arrow1b (pts (xy 152.4 130.81) (xy 151.273496 130.223579)))
    (arrow2a (pts (xy 124.46 130.81) (xy 125.586504 131.396421)))
    (arrow2b (pts (xy 124.46 130.81) (xy 125.586504 130.223579)))
  )
  (dimension 27.94 (width 0.3) (layer Dwgs.User)
    (gr_text "27.940 mm" (at 138.43 126.56) (layer Dwgs.User))
    (feature1 (pts (xy 152.4 123.19) (xy 152.4 125.046421)))
    (feature2 (pts (xy 124.46 123.19) (xy 124.46 125.046421)))
    (crossbar (pts (xy 124.46 124.46) (xy 152.4 124.46)))
    (arrow1a (pts (xy 152.4 124.46) (xy 151.273496 125.046421)))
    (arrow1b (pts (xy 152.4 124.46) (xy 151.273496 123.873579)))
    (arrow2a (pts (xy 124.46 124.46) (xy 125.586504 125.046421)))
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