(kicad_pcb (version 4) (host pcbnew 4.0.6)
  (general
    (links 40)
    (no_connects 0)
    (area 148.006999 93.650999 168.731001 116.661001)
    (thickness 1.6)
    (drawings 16)
    (tracks 140)
    (zones 0)
    (modules 8)
    (nets 17)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 +BATT)
  (net 2 "Net-(BT1-Pad2)")
  (net 3 "Net-(J1-Pad1)")
  (net 4 +3V3)
  (net 5 "Net-(J1-Pad3)")
  (net 6 "Net-(J1-Pad4)")
  (net 7 "Net-(J1-Pad5)")
  (net 8 "Net-(J1-Pad6)")
  (net 9 "Net-(J1-Pad7)")
  (net 10 "Net-(J1-Pad8)")
  (net 11 "Net-(J2-Pad1)")
  (net 12 "Net-(J2-Pad2)")
  (net 13 "Net-(J2-Pad5)")
  (net 14 "Net-(J2-Pad6)")
  (net 15 "Net-(J2-Pad7)")
  (net 16 "Net-(J2-Pad8)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +3V3)
    (add_net +BATT)
    (add_net "Net-(BT1-Pad2)")
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad4)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(J1-Pad6)")
    (add_net "Net-(J1-Pad7)")
    (add_net "Net-(J1-Pad8)")
    (add_net "Net-(J2-Pad1)")
    (add_net "Net-(J2-Pad2)")
    (add_net "Net-(J2-Pad5)")
    (add_net "Net-(J2-Pad6)")
    (add_net "Net-(J2-Pad7)")
    (add_net "Net-(J2-Pad8)")
  )
  (module Pin_Headers:Pin_Header_Straight_1x08 locked placed (layer F.Cu) (tedit 58F03785)
    (at 150.622 96.266)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference J1 (at -5.08 -5.08) (layer F.SilkS) hide)
    (fp_text value CONN_01X08 (at -4.826 -3.556) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 +3V3))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 8 "Net-(J1-Pad6)"))
    (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 9 "Net-(J1-Pad7)"))
    (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 10 "Net-(J1-Pad8)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x08.wrl
      (at (xyz 0 -0.35 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x08 locked placed (layer F.Cu) (tedit 58F036EC)
    (at 166.116 96.266)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference J2 (at 0 -5.1) (layer F.SilkS) hide)
    (fp_text value CONN_01X08 (at 0.254 -3.81) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 +BATT))
    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 "Net-(BT1-Pad2)"))
    (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 "Net-(J2-Pad5)"))
    (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 14 "Net-(J2-Pad6)"))
    (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 "Net-(J2-Pad7)"))
    (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 16 "Net-(J2-Pad8)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x08.wrl
      (at (xyz 0 -0.35 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Housings_SOIC:SOIC-16W_7.5x10.3mm_Pitch1.27mm placed (layer F.Cu) (tedit 58F037BB)
    (at 158.369 104.648)
    (descr "16-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U1 (at 0.127 -3.302) (layer F.SilkS) hide)
    (fp_text value DS3231 (at 0.127 4.064) (layer F.SilkS))
    (pad 1 smd rect (at -4.65 -4.445) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 smd rect (at -4.65 -3.175) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 +3V3))
    (pad 3 smd rect (at -4.65 -1.905) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 smd rect (at -4.65 -0.635) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 5 smd rect (at -4.65 0.635) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (pad 6 smd rect (at -4.65 1.905) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(J1-Pad6)"))
    (pad 7 smd rect (at -4.65 3.175) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(J1-Pad7)"))
    (pad 8 smd rect (at -4.65 4.445) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 "Net-(J1-Pad8)"))
    (pad 9 smd rect (at 4.65 4.445) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 16 "Net-(J2-Pad8)"))
    (pad 10 smd rect (at 4.65 3.175) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 15 "Net-(J2-Pad7)"))
    (pad 11 smd rect (at 4.65 1.905) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 14 "Net-(J2-Pad6)"))
    (pad 12 smd rect (at 4.65 0.635) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 13 "Net-(J2-Pad5)"))
    (pad 13 smd rect (at 4.65 -0.635) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(BT1-Pad2)"))
    (pad 14 smd rect (at 4.65 -1.905) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 +BATT))
    (pad 15 smd rect (at 4.65 -3.175) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 16 smd rect (at 4.65 -4.445) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 "Net-(J2-Pad1)"))
    (model Housings_SOIC.3dshapes/SOIC-16_7.5x10.3mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SSOP:SSOP-16_5.3x6.2mm_Pitch0.65mm placed (layer B.Cu) (tedit 58F03A0A)
    (at 158.242 108.966 270)
    (descr "SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot338-1_po.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U2 (at 0 4.2 270) (layer B.SilkS) hide)
    (fp_text value SSOP-16 (at 0 -4.2 270) (layer B.SilkS))
    (pad 1 smd rect (at -3.45 2.275 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 smd rect (at -3.45 1.625 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 4 +3V3))
    (pad 3 smd rect (at -3.45 0.975 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 smd rect (at -3.45 0.325 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 5 smd rect (at -3.45 -0.325 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (pad 6 smd rect (at -3.45 -0.975 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 8 "Net-(J1-Pad6)"))
    (pad 7 smd rect (at -3.45 -1.625 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 9 "Net-(J1-Pad7)"))
    (pad 8 smd rect (at -3.45 -2.275 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 10 "Net-(J1-Pad8)"))
    (pad 9 smd rect (at 3.45 -2.275 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 16 "Net-(J2-Pad8)"))
    (pad 10 smd rect (at 3.45 -1.625 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 15 "Net-(J2-Pad7)"))
    (pad 11 smd rect (at 3.45 -0.975 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 14 "Net-(J2-Pad6)"))
    (pad 12 smd rect (at 3.45 -0.325 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 13 "Net-(J2-Pad5)"))
    (pad 13 smd rect (at 3.45 0.325 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 2 "Net-(BT1-Pad2)"))
    (pad 14 smd rect (at 3.45 0.975 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 1 +BATT))
    (pad 15 smd rect (at 3.45 1.625 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 16 smd rect (at 3.45 2.275 270) (size 1.2 0.4) (layers B.Cu B.Paste B.Mask)
      (net 11 "Net-(J2-Pad1)"))
    (model Housings_SSOP.3dshapes/SSOP-16_5.3x6.2mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 58F039BB)
    (at 161.798 95.504 180)
    (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.16666666666666666W = 1/6W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.16666666666666666W = 1/6W length 3.6mm diameter 1.6mm")
    (fp_text reference R1 (at 0.95 -1.86 180) (layer F.SilkS) hide)
    (fp_text value SCL_Pullup (at 0.762 -1.778 180) (layer F.SilkS))
    (pad 1 thru_hole circle (at 0 0 180) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad1)"))
    (pad 2 thru_hole oval (at 1.9 0 180) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 4 +3V3))
    (model Resistors_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.393701 0.393701 0.393701))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 58F03997)
    (at 156.464 95.504 180)
    (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.16666666666666666W = 1/6W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.16666666666666666W = 1/6W length 3.6mm diameter 1.6mm")
    (fp_text reference R2 (at 0.95 -1.86 180) (layer F.SilkS) hide)
    (fp_text value SDA_pullup (at 0.762 -1.778 180) (layer F.SilkS))
    (pad 1 thru_hole circle (at 0 0 180) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 2 thru_hole oval (at 1.9 0 180) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask)
      (net 4 +3V3))
    (model Resistors_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.393701 0.393701 0.393701))
      (rotate (xyz 0 0 0))
    )
  )
  (module Buttons_Switches_SMD:SW_SPST_EVQPE1 (layer F.Cu) (tedit 58F03991)
    (at 158.242 113.284)
    (descr "Light Touch Switch")
    (attr smd)
    (fp_text reference SW1 (at 4.826 0 90) (layer F.SilkS))
    (fp_text value Reset (at -0.254 2.54) (layer F.SilkS))
    (pad 2 smd rect (at 2.7 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(BT1-Pad2)"))
    (pad 1 smd rect (at -2.7 0) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad4)"))
  )
  (module Battery_Holders:Seiko_MS621F (layer B.Cu) (tedit 58F03ADF)
    (at 163.068 100.076)
    (descr "Seiko MS621F")
    (tags "Seiko MS621F")
    (attr smd)
    (fp_text reference BT1 (at -4.6 4.4) (layer B.SilkS) hide)
    (fp_text value MS621F (at -3.81 0 90) (layer B.SilkS))
    (pad 1 smd rect (at 0 0.75) (size 2 0.8) (layers B.Cu B.Paste B.Mask)
      (net 1 +BATT))
    (pad 2 smd rect (at 0 -0.75) (size 2 0.8) (layers B.Cu B.Paste B.Mask)
      (net 2 "Net-(BT1-Pad2)"))
  )
  (gr_text - (at 160.528 99.06 90) (layer B.SilkS))
  (gr_text + (at 160.528 100.838 90) (layer B.SilkS))
  (gr_text GND (at 167.894 103.886 270) (layer F.SilkS))
  (gr_text Vbat (at 167.894 101.346 270) (layer F.SilkS))
  (gr_text SDA (at 167.894 98.806 270) (layer F.SilkS))
  (gr_text SCL (at 168.148 96.012 270) (layer F.SilkS))
  (gr_text ~RST (at 148.844 104.394 90) (layer F.SilkS))
  (gr_text ~INT~/SQW (at 148.844 101.346 90) (layer F.SilkS))
  (gr_text 32kHz (at 148.59 96.012 90) (layer F.SilkS))
  (gr_text 3V3 (at 148.844 98.552 90) (layer F.SilkS))
  (gr_text SOP-16W (at 158.242 105.918) (layer F.SilkS))
  (gr_line (start 168.656 116.586) (end 168.656 93.726) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 168.402 116.586) (end 168.656 116.586) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 148.082 116.586) (end 168.402 116.586) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 148.082 93.726) (end 148.082 116.586) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 168.656 93.726) (end 148.082 93.726) (angle 90) (layer Edge.Cuts) (width 0.15))
)
