(kicad_pcb (version 20171130) (host pcbnew 5.0.2+dfsg1-1+deb10u1)
  (general
    (thickness 1.6)
    (drawings 4)
    (tracks 45)
    (zones 0)
    (modules 3)
    (nets 5)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 3.3V)
  (net 2 GND)
  (net 3 SDA)
  (net 4 SCL)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net 3.3V)
    (add_net GND)
    (add_net SCL)
    (add_net SDA)
  )
  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B)
    (at 127 68.834 180)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference C1 (at 3.556 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.65 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 3.3V))
    (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 GND))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5A02F2D3)
    (at 127 72.898)
    (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U1 (at -5.334 -2.032) (layer F.SilkS))
    (fp_text value 24LC32 (at 0 3.5) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 2 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 3 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 4 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 5 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 SDA))
    (pad 6 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 SCL))
    (pad 7 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 8 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 3.3V))
    (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module AaronAudio:e3prom_card_edge (layer F.Cu) (tedit 648A3199)
    (at 127 76.2)
    (fp_text reference J1 (at -5.334 -1.016) (layer F.SilkS))
    (fp_text value Conn_02x04_Counter_Clockwise (at 0 11.43) (layer F.Fab))
    (pad 1 smd rect (at -3.81 5.08) (size 1.778 10.16) (layers F.Cu F.Mask)
      (net 1 3.3V))
    (pad 2 smd rect (at -1.27 5.08) (size 1.778 10.16) (layers F.Cu F.Mask)
      (net 3 SDA))
    (pad 3 smd rect (at 1.27 5.08) (size 1.778 10.16) (layers F.Cu F.Mask)
      (net 4 SCL))
    (pad 4 smd rect (at 3.81 5.08) (size 1.778 10.16) (layers F.Cu F.Mask)
      (net 2 GND))
    (pad 5 smd rect (at 3.81 5.08) (size 1.778 10.16) (layers B.Cu B.Mask)
      (net 1 3.3V))
    (pad 6 smd rect (at 1.27 5.08) (size 1.778 10.16) (layers B.Cu B.Mask)
      (net 3 SDA))
    (pad 7 smd rect (at -1.27 5.08) (size 1.778 10.16) (layers B.Cu B.Mask)
      (net 4 SCL))
    (pad 8 smd rect (at -3.81 5.08) (size 1.778 10.16) (layers B.Cu B.Mask)
      (net 2 GND))
  )
  (gr_line (start 120.65 67.564) (end 120.65 86.614) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 133.35 67.564) (end 120.65 67.564) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 133.35 86.614) (end 133.35 67.564) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 120.65 86.614) (end 133.35 86.614) (layer Edge.Cuts) (width 0.2))
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 120.65 67.564) (xy 133.35 67.564) (xy 133.35 86.614) (xy 120.65 86.614)
      )
    )
  )
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 133.35 67.564) (xy 120.65 67.564) (xy 120.65 86.614) (xy 133.35 86.614)
      )
    )
  )
)
