(kicad_pcb (version 4) (host pcbnew 4.0.3-stable)
  (general
    (links 22)
    (no_connects 0)
    (area 96.599999 73.622599 198.075001 140.5024)
    (thickness 1.6)
    (drawings 6)
    (tracks 105)
    (zones 0)
    (modules 6)
    (nets 19)
  )
  (page A4)
  (layers
    (0 Top signal)
    (31 Bottom signal)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.1524)
    (user_trace_width 0.2)
    (user_trace_width 0.3)
    (user_trace_width 0.5)
    (trace_clearance 0.1524)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6858)
    (via_drill 0.4)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.762)
    (uvia_drill 0.508)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.99898 1.99898)
    (pad_drill 1.19888)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 110.1 82.9)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010e0_80000001)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory Gerber/))
  )
  (net 0 "")
  (net 1 "Net-(J1-Pad1)")
  (net 2 "Net-(J1-Pad2)")
  (net 3 "Net-(J1-Pad5)")
  (net 4 "Net-(J1-Pad6)")
  (net 5 "Net-(P1-Pad3)")
  (net 6 "Net-(P1-Pad4)")
  (net 7 "Net-(P1-Pad5)")
  (net 8 "Net-(P1-Pad6)")
  (net 9 "Net-(P1-Pad7)")
  (net 10 "Net-(P1-Pad8)")
  (net 11 "Net-(P2-Pad7)")
  (net 12 "Net-(P2-Pad8)")
  (net 13 "Net-(P2-Pad9)")
  (net 14 "Net-(P2-Pad10)")
  (net 15 GND)
  (net 16 VCC)
  (net 17 "Net-(P2-Pad15)")
  (net 18 "Net-(P2-Pad3)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.4)
    (uvia_dia 0.762)
    (uvia_drill 0.508)
    (add_net GND)
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(J1-Pad6)")
    (add_net "Net-(P1-Pad3)")
    (add_net "Net-(P1-Pad4)")
    (add_net "Net-(P1-Pad5)")
    (add_net "Net-(P1-Pad6)")
    (add_net "Net-(P1-Pad7)")
    (add_net "Net-(P1-Pad8)")
    (add_net "Net-(P2-Pad10)")
    (add_net "Net-(P2-Pad15)")
    (add_net "Net-(P2-Pad3)")
    (add_net "Net-(P2-Pad7)")
    (add_net "Net-(P2-Pad8)")
    (add_net "Net-(P2-Pad9)")
    (add_net VCC)
  )
  (module Pin_Headers:Pin_Header_Angled_2x05 (layer Top) (tedit 57D0B30D)
    (at 166.1 87 90)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P1 (at -2.3 5.3 180) (layer F.SilkS))
    (fp_text value CONN_02X05 (at -4.5 5.6 180) (layer F.Fab))
    (pad 10 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 1 "Net-(J1-Pad1)"))
    (pad 9 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 3 "Net-(J1-Pad5)"))
    (pad 8 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 10 "Net-(P1-Pad8)"))
    (pad 7 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 9 "Net-(P1-Pad7)"))
    (pad 6 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(P1-Pad6)"))
    (pad 5 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(P1-Pad5)"))
    (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 6 "Net-(P1-Pad4)"))
    (pad 3 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 5 "Net-(P1-Pad3)"))
    (pad 2 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad 1 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 16 VCC))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x05.wrl
      (at (xyz 0.05 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Capacitors_ThroughHole:C_Disc_D3_P2.5 (layer Top) (tedit 57BCD550)
    (at 164.6 131.5 180)
    (descr "Capacitor 3mm Disc, Pitch 2.5mm")
    (tags Capacitor)
    (fp_text reference C1 (at 1.25 -2.5 180) (layer F.SilkS))
    (fp_text value ".01 uf" (at 1.6 2.3 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 16 VCC))
    (pad 2 thru_hole circle (at 2.5 0 180) (size 1.3 1.3) (drill 0.8001) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (model Capacitors_ThroughHole.3dshapes/C_Disc_D3_P2.5.wrl
      (at (xyz 0.0492126 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x16 (layer Top) (tedit 57D0B2E0)
    (at 110 83.1 90)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P2 (at -2.5 10.7 90) (layer F.SilkS))
    (fp_text value CONN_01X16 (at -2.5 19.2 360) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 16 VCC))
    (pad 3 thru_hole oval (at 0 5.08 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 18 "Net-(P2-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 9 "Net-(P1-Pad7)"))
    (pad 5 thru_hole oval (at 0 10.16 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad 6 thru_hole oval (at 0 12.7 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 10 "Net-(P1-Pad8)"))
    (pad 7 thru_hole oval (at 0 15.24 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 11 "Net-(P2-Pad7)"))
    (pad 8 thru_hole oval (at 0 17.78 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 12 "Net-(P2-Pad8)"))
    (pad 9 thru_hole oval (at 0 20.32 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 13 "Net-(P2-Pad9)"))
    (pad 10 thru_hole oval (at 0 22.86 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 14 "Net-(P2-Pad10)"))
    (pad 11 thru_hole oval (at 0 25.4 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 5 "Net-(P1-Pad3)"))
    (pad 12 thru_hole oval (at 0 27.94 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 6 "Net-(P1-Pad4)"))
    (pad 13 thru_hole oval (at 0 30.48 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(P1-Pad5)"))
    (pad 14 thru_hole oval (at 0 33.02 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(P1-Pad6)"))
    (pad 15 thru_hole oval (at 0 35.56 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 17 "Net-(P2-Pad15)"))
    (pad 16 thru_hole oval (at 0 38.1 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x16.wrl
      (at (xyz 0 -0.75 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module myfootprint:DIN_Mini_6P (layer Top) (tedit 57F02C2A)
    (at 178.1 140.1 180)
    (descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F5749180%7FA1%7Fpdf%7FEnglish%7FENG_CD_5749180_A1.pdf%7F5749180-1)
    (tags PS2)
    (fp_text reference J1 (at -0.1 14.4 180) (layer F.SilkS) hide)
    (fp_text value CONN_miniDIN (at -0.1 16 180) (layer F.Fab))
    (pad "" thru_hole circle (at -6.76 5.51 180) (size 3.2 3.2) (drill 2.5) (layers *.Cu *.Mask F.SilkS))
    (pad 2 thru_hole circle (at 1.3 8.5 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 2 "Net-(J1-Pad2)"))
    (pad 4 thru_hole circle (at 3.35 8.5 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 16 VCC))
    (pad 1 thru_hole circle (at -1.3 8.5 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 1 "Net-(J1-Pad1)"))
    (pad 3 thru_hole circle (at -3.35 8.5 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad 6 thru_hole circle (at 3.35 11 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 4 "Net-(J1-Pad6)"))
    (pad 5 thru_hole circle (at -3.35 11 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask F.SilkS)
      (net 3 "Net-(J1-Pad5)"))
    (pad 7 thru_hole circle (at 0 4.7 180) (size 3.2 3.2) (drill 2.5) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad "" thru_hole circle (at 6.76 5.51 180) (size 3.2 3.2) (drill 2.5) (layers *.Cu *.Mask F.SilkS))
    (model Connect.3dshapes/DIN_Mini_6P.wrl
      (at (xyz 0 -0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_ThroughHole:Resistor_Horizontal_RM7mm (layer Top) (tedit 569FCF07)
    (at 145.5 91.1 270)
    (descr "Resistor, Axial,  RM 7.62mm, 1/3W,")
    (tags "Resistor Axial RM 7.62mm 1/3W R3")
    (fp_text reference R1 (at 4.05892 -3.50012 270) (layer F.SilkS))
    (fp_text value 62 (at 3.81 3.81 270) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 17 "Net-(P2-Pad15)"))
    (pad 2 thru_hole circle (at 7.62 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 16 VCC))
  )
  (module myfootprint:Potentiometer_Bourns_3382H (layer Top) (tedit 580A2EE7)
    (at 108.7 95.9 180)
    (descr "Potentiometer, Bourns 3352H 3/8\" Trimpot")
    (tags "Potentiometer, Bourns 3352H")
    (autoplace_cost90 10)
    (autoplace_cost180 10)
    (fp_text reference RV1 (at 2.54 -3.81 180) (layer F.SilkS))
    (fp_text value 10K (at 2.54 8.382 180) (layer F.Fab))
    (pad 2 thru_hole circle (at 2.54 2.54 180) (size 1.99898 1.99898) (drill 1.19888) (layers *.Cu *.Mask F.SilkS)
      (net 18 "Net-(P2-Pad3)"))
    (pad 3 thru_hole circle (at 0 5.08 180) (size 1.99898 1.99898) (drill 1.19888) (layers *.Cu *.Mask F.SilkS)
      (net 15 GND))
    (pad 1 thru_hole circle (at 0 0 180) (size 1.99898 1.99898) (drill 1.19888) (layers *.Cu *.Mask F.SilkS)
      (net 18 "Net-(P2-Pad3)"))
  )
  (gr_text "LCD Motherboard Rev A" (at 111 136.7) (layer F.SilkS))
  (gr_line (start 198 140) (end 100 140) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 100 140) (end 100 80) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 198 80) (end 198 140) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 100 80) (end 198 80) (angle 90) (layer Edge.Cuts) (width 0.15))
  (zone (net 15) (net_name GND) (layer Bottom) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 100.1 80.1) (xy 100 140) (xy 198 140) (xy 198 80) (xy 100 80)
      )
    )
  )
)
