(kicad_pcb (version 20171130) (host pcbnew "(5.1.10)-1")
  (general
    (thickness 1.6)
    (drawings 11)
    (tracks 6)
    (zones 0)
    (modules 3)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal hide)
    (31 B.Cu signal hide)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user hide)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.508)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.6 1.6)
    (pad_drill 0.8)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(U1-Pad2)")
  (net 2 "Net-(U1-Pad6)")
  (net 3 "Net-(U1-Pad3)")
  (net 4 "Net-(U1-Pad4)")
  (net 5 "Net-(J2-Pad1)")
  (net 6 "Net-(U1-Pad5)")
  (net 7 GND)
  (net 8 +3V3)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +3V3)
    (add_net GND)
    (add_net "Net-(J2-Pad1)")
    (add_net "Net-(U1-Pad2)")
    (add_net "Net-(U1-Pad3)")
    (add_net "Net-(U1-Pad4)")
    (add_net "Net-(U1-Pad5)")
    (add_net "Net-(U1-Pad6)")
  )
  (module Package_DIP:DIP-8_W7.62mm (layer F.Cu) (tedit 61575E51)
    (at 142.45 85)
    (descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)")
    (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil")
    (fp_text reference U1 (at 7.8 -2.33) (layer F.SilkS) hide)
    (fp_text value PIC12F629-IP (at 3.81 9.95) (layer F.Fab) hide)
    (fp_text user %R (at 3.81 3.81) (layer F.Fab) hide)
    (pad 8 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 7 GND))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(U1-Pad4)"))
    (pad 7 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(J2-Pad1)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(U1-Pad3)"))
    (pad 6 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(U1-Pad6)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(U1-Pad2)"))
    (pad 5 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 "Net-(U1-Pad5)"))
    (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 8 +3V3))
    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-8_W7.62mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_JST:JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal (layer F.Cu) (tedit 6156ED3E)
    (at 145.25 97.75)
    (descr "JST PH series connector, S2B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator")
    (tags "connector JST PH top entry")
    (fp_text reference J1 (at -1.75 -2.55) (layer F.SilkS) hide)
    (fp_text value Conn_01x02 (at 1 7.45) (layer F.Fab) hide)
    (fp_text user %R (at 1 2.5) (layer F.Fab) hide)
    (pad 2 thru_hole oval (at 2 0) (size 1.2 1.75) (drill 0.75) (layers *.Cu *.Mask)
      (net 7 GND))
    (pad 1 thru_hole oval (at 0 0) (size 1.2 1.75) (drill 0.75) (layers *.Cu *.Mask)
      (net 8 +3V3))
    (model ${KISYS3DMOD}/Connector_JST.3dshapes/JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_JST:JST_PH_S3B-PH-K_1x03_P2.00mm_Horizontal (layer F.Cu) (tedit 6155FB06)
    (at 148.25 79.75 180)
    (descr "JST PH series connector, S3B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator")
    (tags "connector JST PH top entry")
    (fp_text reference J2 (at 6 -3 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x03 (at 2 7.45) (layer F.Fab) hide)
    (fp_text user %R (at 2 2.5) (layer F.Fab) hide)
    (pad 1 thru_hole oval (at 0 0 180) (size 1.2 1.75) (drill 0.75) (layers *.Cu *.Mask)
      (net 5 "Net-(J2-Pad1)"))
    (pad 2 thru_hole oval (at 2 0 180) (size 1.2 1.75) (drill 0.75) (layers *.Cu *.Mask)
      (net 7 GND))
    (pad 3 thru_hole oval (at 4 0 180) (size 1.2 1.75) (drill 0.75) (layers *.Cu *.Mask)
      (net 8 +3V3))
    (model ${KISYS3DMOD}/Connector_JST.3dshapes/JST_PH_S3B-PH-K_1x03_P2.00mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text GND (at 147.3 95.3 90) (layer F.SilkS))
  (gr_text 3V3 (at 145.3 95.3 90) (layer F.SilkS))
  (gr_text TCO (at 148.3 82.25 90) (layer F.SilkS))
  (gr_text GND (at 146.3 82.25 90) (layer F.SilkS))
  (gr_text 3V3 (at 144.3 82.25 90) (layer F.SilkS))
  (gr_text "Holes Version\n" (at 149.7 103.7) (layer B.SilkS))
  (gr_text "VA0 Fan to VA1 Controller Board" (at 146.25 73.75) (layer B.SilkS))
  (gr_line (start 152.5 72.75) (end 152.5 104.75) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 140 72.75) (end 152.5 72.75) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 140 104.75) (end 140 72.75) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 152.5 104.75) (end 140 104.75) (layer Edge.Cuts) (width 0.1))
  (zone (net 0) (net_name "") (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
  )
  (zone (net 5) (net_name "Net-(J2-Pad1)") (layer F.Cu) (hatch edge 0.508)
    (priority 16962)
    (connect_pads yes (clearance 0.2))
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  (zone (net 8) (net_name +3V3) (layer F.Cu) (hatch edge 0.508)
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  (zone (net 7) (net_name GND) (layer B.Cu) (hatch edge 0.508)
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