(kicad_pcb (version 4) (host pcbnew 4.0.0-rc1-stable)
  (general
    (links 2)
    (no_connects 0)
    (area -0.075001 -0.075001 25.475001 25.475001)
    (thickness 1.6)
    (drawings 6)
    (tracks 9)
    (zones 0)
    (modules 29)
    (nets 4)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 0.6 0.6)
    (pad_drill 0.3)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(D1-Pad1)")
  (net 2 "Net-(D1-Pad2)")
  (net 3 Thermal)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net "Net-(D1-Pad1)")
    (add_net "Net-(D1-Pad2)")
    (add_net Thermal)
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.065 8.255 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.335 8.255 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.97 8.89 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.7 8.89 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 11.43 8.89 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 10.795 9.525 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 14.605 9.525 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.335 9.525 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.065 9.525 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 11.43 10.16 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.97 10.16 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.7 10.16 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.335 17.145 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.065 17.145 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.97 16.51 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 11.43 16.51 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 10.795 15.875 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 14.605 15.875 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.7 16.51 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.065 15.875 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.335 15.875 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 13.97 15.24 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 12.7 15.24 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (module .pretty:1pin (layer F.Cu) (tedit 565CC809)
    (at 3.81 21.59)
    (descr "module 1 pin (ou trou mecanique de percage)")
    (tags DEV)
    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS) hide)
    (fp_text value 1pin (at 0 2.794) (layer F.Fab) hide)
    (pad "" np_thru_hole circle (at 0 0) (size 2.921 2.921) (drill 2.921) (layers *.Cu *.Mask))
  )
  (module .pretty:Wire_Pad5x2.5mm (layer F.Cu) (tedit 570699EE)
    (at 5.08 5.08)
    (fp_text reference P2 (at 0 2.25) (layer F.SilkS) hide)
    (fp_text value CONN_01X01 (at 0 -2.25) (layer F.Fab) hide)
    (pad 1 smd rect (at 0 0) (size 5 2.5) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(D1-Pad1)"))
  )
  (module .pretty:Wire_Pad5x2.5mm (layer F.Cu) (tedit 570699EE)
    (at 20.32 20.32)
    (fp_text reference P1 (at 0 2.25) (layer F.SilkS) hide)
    (fp_text value CONN_01X01 (at 0 -2.25) (layer F.Fab) hide)
    (pad 1 smd rect (at 0 0) (size 5 2.5) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(D1-Pad2)"))
  )
  (module .pretty:EAUVA35352 (layer F.Cu) (tedit 57E96FA3)
    (at 12.7 12.7)
    (fp_text reference D1 (at 0 2.75) (layer F.SilkS) hide)
    (fp_text value Led_W/Thermal_Pad (at 0 -2.75) (layer F.Fab) hide)
    (pad 1 smd rect (at -1.35 0) (size 0.8 3.3) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(D1-Pad1)"))
    (pad 2 smd rect (at 1.35 0) (size 0.8 3.3) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(D1-Pad2)"))
    (pad 3 smd rect (at 0 0) (size 1.3 3.3) (layers F.Cu F.Paste F.Mask)
      (net 3 Thermal))
  )
  (module .pretty:1pin (layer F.Cu) (tedit 565CC809)
    (at 21.59 3.81)
    (descr "module 1 pin (ou trou mecanique de percage)")
    (tags DEV)
    (fp_text reference REF** (at 0 -3.048) (layer F.SilkS) hide)
    (fp_text value 1pin (at 0 2.794) (layer F.Fab) hide)
    (pad "" np_thru_hole circle (at 0 0) (size 2.921 2.921) (drill 2.921) (layers *.Cu *.Mask))
  )
  (module .pretty:VIA-0.6mm (layer F.Cu) (tedit 57E9704B)
    (at 11.43 15.24 180)
    (fp_text reference REF** (at 0 1.397 180) (layer F.SilkS) hide)
    (fp_text value VIA-0.6mm (at 0 -1.27 180) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0 180) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
      (net 3 Thermal))
  )
  (gr_text - (at 20.32 22.86) (layer F.SilkS))
  (gr_text + (at 5.08 2.54) (layer F.SilkS))
  (gr_line (start 0 25.4) (end 0 0) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 25.4 25.4) (end 0 25.4) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 25.4 0) (end 25.4 25.4) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 0 0) (end 25.4 0) (layer Edge.Cuts) (width 0.15))
  (zone (net 3) (net_name Thermal) (layer F.Cu) (hatch edge 0.508)
    (priority 1)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 25.4 25.4) (xy 0 25.4) (xy 0 0) (xy 25.4 0) (xy 25.4 25.4)
      )
    )
  )
  (zone (net 3) (net_name Thermal) (layer B.Cu) (hatch edge 0.508)
    (connect_pads yes (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 0 0) (xy 25.4 0) (xy 25.4 25.4) (xy 0 25.4)
      )
    )
  )
  (zone (net 3) (net_name Thermal) (layer F.Cu) (hatch edge 0.508)
    (priority 1)
    (connect_pads yes (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 12.7 10.668) (xy 9.144 10.668) (xy 9.144 6.604) (xy 16.51 6.604) (xy 16.51 10.668)
        (xy 12.446 10.668)
      )
    )
  )
  (zone (net 3) (net_name Thermal) (layer F.Cu) (hatch edge 0.508)
    (priority 1)
    (connect_pads yes (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 12.7 14.732) (xy 9.144 14.732) (xy 9.144 18.796) (xy 16.51 18.796) (xy 16.51 14.732)
      )
    )
  )
  (zone (net 3) (net_name Thermal) (layer B.Mask) (hatch edge 0.508)
    (priority 1)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 25.4 25.4) (xy 25.4 25.4) (xy 0 25.4) (xy 0 0) (xy 25.4 0)
      )
    )
  )
)
