(kicad_pcb (version 4) (host pcbnew 4.0.2-stable)
  (general
    (links 16)
    (no_connects 0)
    (area 124.384999 96.444999 167.715001 116.915001)
    (thickness 1.6)
    (drawings 10)
    (tracks 16)
    (zones 0)
    (modules 2)
    (nets 17)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.5)
    (trace_clearance 0.5)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.5)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (grid_origin 146.05 104.14)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(CN1-Pad15)")
  (net 2 "Net-(CN1-Pad16)")
  (net 3 "Net-(CN1-Pad14)")
  (net 4 "Net-(CN1-Pad13)")
  (net 5 "Net-(CN1-Pad9)")
  (net 6 "Net-(CN1-Pad10)")
  (net 7 "Net-(CN1-Pad12)")
  (net 8 "Net-(CN1-Pad11)")
  (net 9 "Net-(CN1-Pad3)")
  (net 10 "Net-(CN1-Pad4)")
  (net 11 "Net-(CN1-Pad2)")
  (net 12 "Net-(CN1-Pad1)")
  (net 13 "Net-(CN1-Pad5)")
  (net 14 "Net-(CN1-Pad6)")
  (net 15 "Net-(CN1-Pad8)")
  (net 16 "Net-(CN1-Pad7)")
  (net_class Default "This is the default net class."
    (clearance 0.5)
    (trace_width 0.5)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net "Net-(CN1-Pad1)")
    (add_net "Net-(CN1-Pad10)")
    (add_net "Net-(CN1-Pad11)")
    (add_net "Net-(CN1-Pad12)")
    (add_net "Net-(CN1-Pad13)")
    (add_net "Net-(CN1-Pad14)")
    (add_net "Net-(CN1-Pad15)")
    (add_net "Net-(CN1-Pad16)")
    (add_net "Net-(CN1-Pad2)")
    (add_net "Net-(CN1-Pad3)")
    (add_net "Net-(CN1-Pad4)")
    (add_net "Net-(CN1-Pad5)")
    (add_net "Net-(CN1-Pad6)")
    (add_net "Net-(CN1-Pad7)")
    (add_net "Net-(CN1-Pad8)")
    (add_net "Net-(CN1-Pad9)")
  )
  (module Pin_Headers:Pin_Header_Angled_1x16 (layer F.Cu) (tedit 57A769BE)
    (at 127 113.03)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference CN2 (at -3.81 0) (layer F.SilkS) hide)
    (fp_text value "To keyboard socket strip" (at 19.05 -4.064) (layer F.SilkS))
    (pad 1 thru_hole rect (at 0 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 12 "Net-(CN1-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 11 "Net-(CN1-Pad2)"))
    (pad 3 thru_hole oval (at 5.08 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 9 "Net-(CN1-Pad3)"))
    (pad 4 thru_hole oval (at 7.62 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 10 "Net-(CN1-Pad4)"))
    (pad 5 thru_hole oval (at 10.16 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 13 "Net-(CN1-Pad5)"))
    (pad 6 thru_hole oval (at 12.7 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 14 "Net-(CN1-Pad6)"))
    (pad 7 thru_hole oval (at 15.24 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 16 "Net-(CN1-Pad7)"))
    (pad 8 thru_hole oval (at 17.78 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 15 "Net-(CN1-Pad8)"))
    (pad 9 thru_hole oval (at 20.32 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 5 "Net-(CN1-Pad9)"))
    (pad 10 thru_hole oval (at 22.86 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 6 "Net-(CN1-Pad10)"))
    (pad 11 thru_hole oval (at 25.4 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(CN1-Pad11)"))
    (pad 12 thru_hole oval (at 27.94 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(CN1-Pad12)"))
    (pad 13 thru_hole oval (at 30.48 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 4 "Net-(CN1-Pad13)"))
    (pad 14 thru_hole oval (at 33.02 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 3 "Net-(CN1-Pad14)"))
    (pad 15 thru_hole oval (at 35.56 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 1 "Net-(CN1-Pad15)"))
    (pad 16 thru_hole oval (at 38.1 0 270) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 2 "Net-(CN1-Pad16)"))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x16.wrl
      (at (xyz 0.75 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )
  (module 0Titanium:CocoKeyboardFlatFlexEdge (layer F.Cu) (tedit 57A76759)
    (at 146.05 104.14)
    (fp_text reference CN1 (at 0 -10.16) (layer F.SilkS) hide)
    (fp_text value "To main board flex connector" (at 0 1.27) (layer F.SilkS))
    (pad 15 connect rect (at 16.51 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 1 "Net-(CN1-Pad15)"))
    (pad 16 connect rect (at 19.05 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 2 "Net-(CN1-Pad16)"))
    (pad 14 connect rect (at 13.97 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 3 "Net-(CN1-Pad14)"))
    (pad 13 connect rect (at 11.43 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 4 "Net-(CN1-Pad13)"))
    (pad 9 connect rect (at 1.27 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 5 "Net-(CN1-Pad9)"))
    (pad 10 connect rect (at 3.81 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 6 "Net-(CN1-Pad10)"))
    (pad 12 connect rect (at 8.89 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 7 "Net-(CN1-Pad12)"))
    (pad 11 connect rect (at 6.35 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 8 "Net-(CN1-Pad11)"))
    (pad 3 connect rect (at -13.97 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 9 "Net-(CN1-Pad3)"))
    (pad 4 connect rect (at -11.43 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 10 "Net-(CN1-Pad4)"))
    (pad 2 connect rect (at -16.51 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 11 "Net-(CN1-Pad2)"))
    (pad 1 connect rect (at -19.05 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 12 "Net-(CN1-Pad1)"))
    (pad 5 connect rect (at -8.89 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 13 "Net-(CN1-Pad5)"))
    (pad 6 connect rect (at -6.35 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 14 "Net-(CN1-Pad6)"))
    (pad 8 connect rect (at -1.27 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 15 "Net-(CN1-Pad8)"))
    (pad 7 connect rect (at -3.81 -3.81) (size 1.651 7.62) (layers F.Cu F.Mask)
      (net 16 "Net-(CN1-Pad7)"))
  )
  (gr_text "(Use standard right angle pin header)" (at 146.05 110.49) (layer F.SilkS))
  (gr_line (start 167.64 116.205) (end 167.64 97.155) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 125.095 116.84) (end 167.005 116.84) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 124.46 97.155) (end 124.46 116.205) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 167.005 96.52) (end 125.095 96.52) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 167.005 97.155) (end 167.005 96.52) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 167.005 116.205) (end 167.64 116.205) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 125.095 116.205) (end 125.095 116.84) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 125.095 97.155) (end 124.46 97.155) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_text "Keyboard socket strip to flat flex adapter for\nTandy Color Computer (August 2016)\n\nFabricate on PCB as close to\n0.35mm thickness as possible." (at 146.05 107.95) (layer B.SilkS))
  (zone (net 0) (net_name "") (layer B.Mask) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 167.64 104.14) (xy 124.46 104.14) (xy 124.46 96.52) (xy 167.64 96.52) (xy 167.64 104.14)
      )
    )
  )
  (zone (net 0) (net_name "") (layer F.Mask) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 167.64 104.14) (xy 124.46 104.14) (xy 124.46 96.52) (xy 167.64 96.52) (xy 167.64 104.14)
      )
    )
  )
)
