(kicad_pcb (version 4) (host pcbnew 4.0.4-stable)
  (general
    (links 92)
    (no_connects 0)
    (area 114.070001 73.5 184.685715 141.130001)
    (thickness 1.6)
    (drawings 38)
    (tracks 254)
    (zones 0)
    (modules 17)
    (nets 69)
  )
  (page A4)
  (title_block
    (title "ZX Spectrum Z80 8-bit Universal IDE")
    (date 2016-12-14)
    (rev 0.99a)
    (comment 1 "Debounced NMI button")
    (comment 2 "Compatible with +3e ROM & PPROM")
    (comment 4 "Based on design by G. Lancaster & P. Putnik")
  )
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user hide)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.2032)
    (trace_clearance 0.2032)
    (zone_clearance 0.508)
    (zone_45_only yes)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (grid_origin 158.115 113.665)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00000_00000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 5)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 VCC)
  (net 2 GND)
  (net 3 "Net-(IDE1-Pad1)")
  (net 4 "Net-(IDE1-Pad2)")
  (net 5 /D7)
  (net 6 "Net-(IDE1-Pad4)")
  (net 7 /D6)
  (net 8 "Net-(IDE1-Pad6)")
  (net 9 /D5)
  (net 10 "Net-(IDE1-Pad8)")
  (net 11 /D4)
  (net 12 "Net-(IDE1-Pad10)")
  (net 13 /D3)
  (net 14 "Net-(IDE1-Pad12)")
  (net 15 /D2)
  (net 16 "Net-(IDE1-Pad14)")
  (net 17 /D1)
  (net 18 "Net-(IDE1-Pad16)")
  (net 19 /D0)
  (net 20 "Net-(IDE1-Pad18)")
  (net 21 "Net-(IDE1-Pad20)")
  (net 22 "Net-(IDE1-Pad21)")
  (net 23 /~WR~)
  (net 24 /~RD~)
  (net 25 "Net-(IDE1-Pad27)")
  (net 26 "Net-(IDE1-Pad28)")
  (net 27 "Net-(IDE1-Pad29)")
  (net 28 "Net-(IDE1-Pad31)")
  (net 29 "Net-(IDE1-Pad32)")
  (net 30 /A12)
  (net 31 "Net-(IDE1-Pad34)")
  (net 32 /A8)
  (net 33 /A13)
  (net 34 /CS0)
  (net 35 /A11)
  (net 36 /A14)
  (net 37 /A15)
  (net 38 /~CLK~)
  (net 39 /~INT~)
  (net 40 /~NMI~)
  (net 41 /~HALT~)
  (net 42 /~MREQ~)
  (net 43 /~IORQ~)
  (net 44 /A10)
  (net 45 /A9)
  (net 46 /A7)
  (net 47 /A6)
  (net 48 /A5)
  (net 49 /A4)
  (net 50 /A3)
  (net 51 /A2)
  (net 52 /A1)
  (net 53 /A0)
  (net 54 /~RFSH~)
  (net 55 /~M1~)
  (net 56 /~RESET~)
  (net 57 /~BRQ~)
  (net 58 /~WAIT~)
  (net 59 /~BACT~)
  (net 60 "Net-(Q1-Pad2)")
  (net 61 "Net-(U2-Pad10)")
  (net 62 "Net-(U2-Pad12)")
  (net 63 "Net-(D1-Pad1)")
  (net 64 "Net-(D1-Pad2)")
  (net 65 "Net-(C3-Pad1)")
  (net 66 "Net-(IDE1-Pad33)")
  (net 67 "Net-(IDE1-Pad35)")
  (net 68 "Net-(IDE1-Pad36)")
  (net_class Default "This is the default net class."
    (clearance 0.2032)
    (trace_width 0.2032)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /A0)
    (add_net /A1)
    (add_net /A10)
    (add_net /A11)
    (add_net /A12)
    (add_net /A13)
    (add_net /A14)
    (add_net /A15)
    (add_net /A2)
    (add_net /A3)
    (add_net /A4)
    (add_net /A5)
    (add_net /A6)
    (add_net /A7)
    (add_net /A8)
    (add_net /A9)
    (add_net /CS0)
    (add_net /D0)
    (add_net /D1)
    (add_net /D2)
    (add_net /D3)
    (add_net /D4)
    (add_net /D5)
    (add_net /D6)
    (add_net /D7)
    (add_net /~BACT~)
    (add_net /~BRQ~)
    (add_net /~CLK~)
    (add_net /~HALT~)
    (add_net /~INT~)
    (add_net /~IORQ~)
    (add_net /~M1~)
    (add_net /~MREQ~)
    (add_net /~NMI~)
    (add_net /~RD~)
    (add_net /~RESET~)
    (add_net /~RFSH~)
    (add_net /~WAIT~)
    (add_net /~WR~)
    (add_net "Net-(C3-Pad1)")
    (add_net "Net-(D1-Pad1)")
    (add_net "Net-(D1-Pad2)")
    (add_net "Net-(IDE1-Pad1)")
    (add_net "Net-(IDE1-Pad10)")
    (add_net "Net-(IDE1-Pad12)")
    (add_net "Net-(IDE1-Pad14)")
    (add_net "Net-(IDE1-Pad16)")
    (add_net "Net-(IDE1-Pad18)")
    (add_net "Net-(IDE1-Pad2)")
    (add_net "Net-(IDE1-Pad20)")
    (add_net "Net-(IDE1-Pad21)")
    (add_net "Net-(IDE1-Pad27)")
    (add_net "Net-(IDE1-Pad28)")
    (add_net "Net-(IDE1-Pad29)")
    (add_net "Net-(IDE1-Pad31)")
    (add_net "Net-(IDE1-Pad32)")
    (add_net "Net-(IDE1-Pad33)")
    (add_net "Net-(IDE1-Pad34)")
    (add_net "Net-(IDE1-Pad35)")
    (add_net "Net-(IDE1-Pad36)")
    (add_net "Net-(IDE1-Pad4)")
    (add_net "Net-(IDE1-Pad6)")
    (add_net "Net-(IDE1-Pad8)")
    (add_net "Net-(Q1-Pad2)")
    (add_net "Net-(U2-Pad10)")
    (add_net "Net-(U2-Pad12)")
  )
  (net_class PWR ""
    (clearance 0.2032)
    (trace_width 0.3048)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net VCC)
  )
  (module Capacitors_SMD:C_1206_HandSoldering (layer F.Cu) (tedit 583AB90B)
    (at 137.795 102.235 180)
    (descr "Capacitor SMD 1206, hand soldering")
    (tags "capacitor 1206")
    (attr smd)
    (fp_text reference C1 (at 0 1.905 180) (layer F.SilkS))
    (fp_text value 22nF (at 0 -1.905 180) (layer F.Fab))
    (pad 1 smd rect (at -2 0 180) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (pad 2 smd rect (at 2 0 180) (size 2 1.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_1206_HandSoldering.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module LEDs:LED-3MM (layer F.Cu) (tedit 58473B9B)
    (at 154.94 130.81 180)
    (descr "LED 3mm round vertical")
    (tags "LED  3mm round vertical")
    (fp_text reference D1 (at 1.27 3.175 360) (layer F.SilkS))
    (fp_text value Yellow (at 1.3 -2.9 180) (layer F.Fab) hide)
    (fp_text user K (at -2.032 0 180) (layer F.SilkS))
    (pad 1 thru_hole rect (at 0 0 270) (size 2 2) (drill 1.00076) (layers *.Cu *.Mask)
      (net 63 "Net-(D1-Pad1)"))
    (pad 2 thru_hole circle (at 2.54 0 180) (size 2 2) (drill 1.00076) (layers *.Cu *.Mask)
      (net 64 "Net-(D1-Pad2)"))
    (model LEDs.3dshapes/LED-3MM.wrl
      (at (xyz 0.05 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Angled_2x20 (layer F.Cu) (tedit 5851C60B)
    (at 161.29 82.55)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference IDE1 (at 3.81 50.8) (layer F.SilkS))
    (fp_text value CONN_02X20 (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 "Net-(IDE1-Pad1)"))
    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 "Net-(IDE1-Pad2)"))
    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 /D7))
    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 "Net-(IDE1-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 /D6))
    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 8 "Net-(IDE1-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 9 /D5))
    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 10 "Net-(IDE1-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 11 /D4))
    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 12 "Net-(IDE1-Pad10)"))
    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 /D3))
    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 14 "Net-(IDE1-Pad12)"))
    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 /D2))
    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 16 "Net-(IDE1-Pad14)"))
    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 17 /D1))
    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 18 "Net-(IDE1-Pad16)"))
    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 19 /D0))
    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 20 "Net-(IDE1-Pad18)"))
    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 21 "Net-(IDE1-Pad20)"))
    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 22 "Net-(IDE1-Pad21)"))
    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 23 /~WR~))
    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 24 /~RD~))
    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 25 "Net-(IDE1-Pad27)"))
    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 26 "Net-(IDE1-Pad28)"))
    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 27 "Net-(IDE1-Pad29)"))
    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 28 "Net-(IDE1-Pad31)"))
    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 29 "Net-(IDE1-Pad32)"))
    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 66 "Net-(IDE1-Pad33)"))
    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 31 "Net-(IDE1-Pad34)"))
    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 67 "Net-(IDE1-Pad35)"))
    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 68 "Net-(IDE1-Pad36)"))
    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 34 /CS0))
    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 63 "Net-(D1-Pad1)"))
    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Angled_2x20.wrl
      (at (xyz 0.05 -0.95 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x20 (layer B.Cu) (tedit 5843398D)
    (at 144.145 130.81)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P1_1 (at 0 3.175) (layer F.SilkS) hide)
    (fp_text value CONN_01X20 (at 0 3.1) (layer B.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 35 /A11))
    (pad 2 thru_hole oval (at 0 -2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 30 /A12))
    (pad 3 thru_hole oval (at 0 -5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 33 /A13))
    (pad 4 thru_hole oval (at 0 -7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 36 /A14))
    (pad 5 thru_hole oval (at 0 -10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 37 /A15))
    (pad 6 thru_hole oval (at 0 -12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 38 /~CLK~))
    (pad 7 thru_hole oval (at 0 -15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 11 /D4))
    (pad 8 thru_hole oval (at 0 -17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 /D3))
    (pad 9 thru_hole oval (at 0 -20.32) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 9 /D5))
    (pad 10 thru_hole oval (at 0 -22.86) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 /D6))
    (pad 11 thru_hole oval (at 0 -25.4) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 12 thru_hole oval (at 0 -27.94) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 /D2))
    (pad 13 thru_hole oval (at 0 -30.48) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 /D7))
    (pad 14 thru_hole oval (at 0 -33.02) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 19 /D0))
    (pad 15 thru_hole oval (at 0 -35.56) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 17 /D1))
    (pad 16 thru_hole oval (at 0 -38.1) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 39 /~INT~))
    (pad 17 thru_hole oval (at 0 -40.64) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 40 /~NMI~))
    (pad 18 thru_hole oval (at 0 -43.18) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 41 /~HALT~))
    (pad 19 thru_hole oval (at 0 -45.72) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 42 /~MREQ~))
    (pad 20 thru_hole oval (at 0 -48.26) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 43 /~IORQ~))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x20.wrl
      (at (xyz 0 -0.95 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x20 (layer B.Cu) (tedit 58433991)
    (at 128.905 130.81)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference P1_2 (at 0 3.175) (layer F.SilkS) hide)
    (fp_text value CONN_01X20 (at 0 3.1) (layer B.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 44 /A10))
    (pad 2 thru_hole oval (at 0 -2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 45 /A9))
    (pad 3 thru_hole oval (at 0 -5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 32 /A8))
    (pad 4 thru_hole oval (at 0 -7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 46 /A7))
    (pad 5 thru_hole oval (at 0 -10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 47 /A6))
    (pad 6 thru_hole oval (at 0 -12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 48 /A5))
    (pad 7 thru_hole oval (at 0 -15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 49 /A4))
    (pad 8 thru_hole oval (at 0 -17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 50 /A3))
    (pad 9 thru_hole oval (at 0 -20.32) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 51 /A2))
    (pad 10 thru_hole oval (at 0 -22.86) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 52 /A1))
    (pad 11 thru_hole oval (at 0 -25.4) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 53 /A0))
    (pad 12 thru_hole oval (at 0 -27.94) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 13 thru_hole oval (at 0 -30.48) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 54 /~RFSH~))
    (pad 14 thru_hole oval (at 0 -33.02) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 55 /~M1~))
    (pad 15 thru_hole oval (at 0 -35.56) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 56 /~RESET~))
    (pad 16 thru_hole oval (at 0 -38.1) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 57 /~BRQ~))
    (pad 17 thru_hole oval (at 0 -40.64) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 58 /~WAIT~))
    (pad 18 thru_hole oval (at 0 -43.18) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 59 /~BACT~))
    (pad 19 thru_hole oval (at 0 -45.72) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 23 /~WR~))
    (pad 20 thru_hole oval (at 0 -48.26) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 24 /~RD~))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x20.wrl
      (at (xyz 0 -0.95 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module TO_SOT_Packages_THT:TO-92_Horizontal1_Inline_Narrow_Oval (layer F.Cu) (tedit 5851C82A)
    (at 153.67 82.55)
    (descr "TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.6mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (fp_text reference Q1 (at 3.81 1.905 90) (layer F.SilkS))
    (fp_text value BC558 (at 1.27 6.35 270) (layer F.Fab))
    (pad 2 thru_hole oval (at 1.27 0 180) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 60 "Net-(Q1-Pad2)"))
    (pad 3 thru_hole oval (at 2.54 0 180) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 3 "Net-(IDE1-Pad1)"))
    (pad 1 thru_hole oval (at 0 0 180) (size 0.89916 1.50114) (drill 0.6) (layers *.Cu *.Mask)
      (net 2 GND))
    (model TO_SOT_Packages_THT.3dshapes/TO-92_Horizontal1_Inline_Narrow_Oval.wrl
      (at (xyz 0.05 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )
  (module Resistors_ThroughHole:Resistor_Horizontal_RM7mm (layer F.Cu) (tedit 5851C812)
    (at 150.495 82.55 270)
    (descr "Resistor, Axial,  RM 7.62mm, 1/3W,")
    (tags "Resistor Axial RM 7.62mm 1/3W R3")
    (fp_text reference R1 (at -1.905 0 360) (layer F.SilkS))
    (fp_text value 100k (at 3.81 0 270) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 60 "Net-(Q1-Pad2)"))
    (pad 2 thru_hole circle (at 7.62 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 56 /~RESET~))
  )
  (module Resistors_ThroughHole:Resistor_Horizontal_RM7mm (layer F.Cu) (tedit 58449204)
    (at 158.115 119.38 270)
    (descr "Resistor, Axial,  RM 7.62mm, 1/3W,")
    (tags "Resistor Axial RM 7.62mm 1/3W R3")
    (fp_text reference R2 (at -1.778 0.127 360) (layer F.SilkS))
    (fp_text value 150 (at 3.81 0 270) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 1 VCC))
    (pad 2 thru_hole circle (at 7.62 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 64 "Net-(D1-Pad2)"))
  )
  (module Housings_DIP:DIP-40_W15.24mm (layer F.Cu) (tedit 5843E43B)
    (at 146.685 130.81 180)
    (descr "40-lead dip package, row spacing 15.24 mm (600 mils)")
    (tags "dil dip 2.54 600")
    (fp_text reference U1 (at 6.985 -3.175 180) (layer F.SilkS))
    (fp_text value Z80CPU (at 8.89 0 180) (layer F.Fab))
    (pad 1 thru_hole oval (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 35 /A11))
    (pad 2 thru_hole oval (at 0 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 30 /A12))
    (pad 3 thru_hole oval (at 0 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 33 /A13))
    (pad 4 thru_hole oval (at 0 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 36 /A14))
    (pad 5 thru_hole oval (at 0 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 37 /A15))
    (pad 6 thru_hole oval (at 0 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 38 /~CLK~))
    (pad 7 thru_hole oval (at 0 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 11 /D4))
    (pad 8 thru_hole oval (at 0 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 13 /D3))
    (pad 9 thru_hole oval (at 0 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 9 /D5))
    (pad 10 thru_hole oval (at 0 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 7 /D6))
    (pad 11 thru_hole oval (at 0 25.4 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 12 thru_hole oval (at 0 27.94 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 15 /D2))
    (pad 13 thru_hole oval (at 0 30.48 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 /D7))
    (pad 14 thru_hole oval (at 0 33.02 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 19 /D0))
    (pad 15 thru_hole oval (at 0 35.56 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 17 /D1))
    (pad 16 thru_hole oval (at 0 38.1 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 39 /~INT~))
    (pad 17 thru_hole oval (at 0 40.64 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 40 /~NMI~))
    (pad 18 thru_hole oval (at 0 43.18 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 41 /~HALT~))
    (pad 19 thru_hole oval (at 0 45.72 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 42 /~MREQ~))
    (pad 20 thru_hole oval (at 0 48.26 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 43 /~IORQ~))
    (pad 21 thru_hole oval (at 15.24 48.26 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 24 /~RD~))
    (pad 22 thru_hole oval (at 15.24 45.72 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 23 /~WR~))
    (pad 23 thru_hole oval (at 15.24 43.18 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 59 /~BACT~))
    (pad 24 thru_hole oval (at 15.24 40.64 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 58 /~WAIT~))
    (pad 25 thru_hole oval (at 15.24 38.1 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 57 /~BRQ~))
    (pad 26 thru_hole oval (at 15.24 35.56 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 56 /~RESET~))
    (pad 27 thru_hole oval (at 15.24 33.02 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 55 /~M1~))
    (pad 28 thru_hole oval (at 15.24 30.48 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 54 /~RFSH~))
    (pad 29 thru_hole oval (at 15.24 27.94 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 30 thru_hole oval (at 15.24 25.4 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 53 /A0))
    (pad 31 thru_hole oval (at 15.24 22.86 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 52 /A1))
    (pad 32 thru_hole oval (at 15.24 20.32 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 51 /A2))
    (pad 33 thru_hole oval (at 15.24 17.78 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 50 /A3))
    (pad 34 thru_hole oval (at 15.24 15.24 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 49 /A4))
    (pad 35 thru_hole oval (at 15.24 12.7 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 48 /A5))
    (pad 36 thru_hole oval (at 15.24 10.16 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 47 /A6))
    (pad 37 thru_hole oval (at 15.24 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 46 /A7))
    (pad 38 thru_hole oval (at 15.24 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 32 /A8))
    (pad 39 thru_hole oval (at 15.24 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 45 /A9))
    (pad 40 thru_hole oval (at 15.24 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 44 /A10))
    (model Housings_DIP.3dshapes/DIP-40_W15.24mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm (layer F.Cu) (tedit 583AB903)
    (at 137.795 94.615 180)
    (descr "14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U2 (at 0 5.715 180) (layer F.SilkS))
    (fp_text value 74LS10 (at 0 0 270) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 49 /A4))
    (pad 2 smd rect (at -2.7 -2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 49 /A4))
    (pad 3 smd rect (at -2.7 -1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 43 /~IORQ~))
    (pad 4 smd rect (at -2.7 0 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 43 /~IORQ~))
    (pad 5 smd rect (at -2.7 1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 43 /~IORQ~))
    (pad 6 smd rect (at -2.7 2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 61 "Net-(U2-Pad10)"))
    (pad 7 smd rect (at -2.7 3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 8 smd rect (at 2.7 3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 34 /CS0))
    (pad 9 smd rect (at 2.7 2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 62 "Net-(U2-Pad12)"))
    (pad 10 smd rect (at 2.7 1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 61 "Net-(U2-Pad10)"))
    (pad 11 smd rect (at 2.7 0 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 55 /~M1~))
    (pad 12 smd rect (at 2.7 -1.27 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 62 "Net-(U2-Pad12)"))
    (pad 13 smd rect (at 2.7 -2.54 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 49 /A4))
    (pad 14 smd rect (at 2.7 -3.81 180) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (model Housings_SOIC.3dshapes/SOIC-14_3.9x8.7mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module "Z80 UIDE:logo-speccypl" (layer F.Cu) (tedit 0)
    (at 152.654 134.366)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module "Z80 UIDE:JUMP-3" (layer F.Cu) (tedit 5843E380)
    (at 136.525 118.11 270)
    (fp_text reference J0 (at -2.54 0 360) (layer F.SilkS))
    (fp_text value CONN_01X03 (at 0 -2.286 270) (layer F.Fab) hide)
    (pad 3 smd rect (at 1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 32 /A8) (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 2 smd oval (at 0 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 67 "Net-(IDE1-Pad35)") (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 1 smd rect (at -1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 51 /A2) (solder_mask_margin 0.2032) (clearance 0.1524))
  )
  (module "Z80 UIDE:JUMP-3" (layer F.Cu) (tedit 5843E415)
    (at 151.13 124.46 270)
    (fp_text reference J1 (at -2.54 0 360) (layer F.SilkS))
    (fp_text value CONN_01X03 (at 0 -2.286 270) (layer F.Fab) hide)
    (pad 3 smd rect (at 1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 30 /A12) (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 2 smd oval (at 0 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 66 "Net-(IDE1-Pad33)") (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 1 smd rect (at -1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 47 /A6) (solder_mask_margin 0.2032) (clearance 0.1524))
  )
  (module "Z80 UIDE:JUMP-3" (layer F.Cu) (tedit 5843E41A)
    (at 151.13 118.11 270)
    (fp_text reference J2 (at -2.54 0 360) (layer F.SilkS))
    (fp_text value CONN_01X03 (at 0 -2.286 270) (layer F.Fab) hide)
    (pad 3 smd rect (at 1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 33 /A13) (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 2 smd oval (at 0 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 68 "Net-(IDE1-Pad36)") (solder_mask_margin 0.2032) (clearance 0.1524))
    (pad 1 smd rect (at -1.27 0 270) (size 0.762 1.524) (layers F.Cu F.Paste F.Mask)
      (net 46 /A7) (solder_mask_margin 0.2032) (clearance 0.1524))
  )
  (module Resistors_ThroughHole:Resistor_Horizontal_RM7mm (layer F.Cu) (tedit 5851CDBD)
    (at 158.115 107.95 270)
    (descr "Resistor, Axial,  RM 7.62mm, 1/3W,")
    (tags "Resistor Axial RM 7.62mm 1/3W R3")
    (fp_text reference R3 (at -1.905 0 360) (layer F.SilkS))
    (fp_text value 1M (at 3.81 0 270) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 65 "Net-(C3-Pad1)"))
    (pad 2 thru_hole circle (at 7.62 0 270) (size 1.99898 1.99898) (drill 1.00076) (layers *.Cu *.SilkS *.Mask)
      (net 2 GND))
  )
  (module Pin_Headers:Pin_Header_Straight_1x02 (layer F.Cu) (tedit 5851C803)
    (at 150.495 93.345)
    (descr "Through hole pin header")
    (tags "pin header")
    (fp_text reference SW1 (at 2.54 1.27 90) (layer F.SilkS))
    (fp_text value SW_PUSH_SMALL_H (at 0 -3.1) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at 0 0) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 40 /~NMI~))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
      (net 65 "Net-(C3-Pad1)"))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
      (at (xyz 0 -0.05 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Capacitors_ThroughHole:C_Rect_L4_W2.5_P2.5 (layer F.Cu) (tedit 5851CDB6)
    (at 153.67 110.49 270)
    (descr "Film Capacitor Length 4mm x Width 2.5mm, Pitch 2.5mm")
    (tags Capacitor)
    (fp_text reference C3 (at -1.905 0 360) (layer F.SilkS))
    (fp_text value 3.3nF (at 1.27 -1.905 270) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask)
      (net 65 "Net-(C3-Pad1)"))
    (pad 2 thru_hole circle (at 2.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask)
      (net 2 GND))
  )
  (dimension 56.515 (width 0.3) (layer Dwgs.User)
    (gr_text "2.2250 in" (at 179.15 107.6325 90) (layer Dwgs.User))
    (feature1 (pts (xy 167.64 79.375) (xy 180.5 79.375)))
    (feature2 (pts (xy 167.64 135.89) (xy 180.5 135.89)))
    (crossbar (pts (xy 177.8 135.89) (xy 177.8 79.375)))
    (arrow1a (pts (xy 177.8 79.375) (xy 178.386421 80.501504)))
    (arrow1b (pts (xy 177.8 79.375) (xy 177.213579 80.501504)))
    (arrow2a (pts (xy 177.8 135.89) (xy 178.386421 134.763496)))
    (arrow2b (pts (xy 177.8 135.89) (xy 177.213579 134.763496)))
  )
  (dimension 43.18 (width 0.3) (layer Dwgs.User)
    (gr_text "1.7000 in" (at 147.32 139.78) (layer Dwgs.User))
    (feature1 (pts (xy 168.91 134.62) (xy 168.91 141.13)))
    (feature2 (pts (xy 125.73 134.62) (xy 125.73 141.13)))
    (crossbar (pts (xy 125.73 138.43) (xy 168.91 138.43)))
    (arrow1a (pts (xy 168.91 138.43) (xy 167.783496 139.016421)))
    (arrow1b (pts (xy 168.91 138.43) (xy 167.783496 137.843579)))
    (arrow2a (pts (xy 125.73 138.43) (xy 126.856504 139.016421)))
    (arrow2b (pts (xy 125.73 138.43) (xy 126.856504 137.843579)))
  )
  (dimension 43.18 (width 0.3) (layer Dwgs.User)
    (gr_text "43.180 mm" (at 147.32 74.85) (layer Dwgs.User))
    (feature1 (pts (xy 168.91 80.645) (xy 168.91 73.5)))
    (feature2 (pts (xy 125.73 80.645) (xy 125.73 73.5)))
    (crossbar (pts (xy 125.73 76.2) (xy 168.91 76.2)))
    (arrow1a (pts (xy 168.91 76.2) (xy 167.783496 76.786421)))
    (arrow1b (pts (xy 168.91 76.2) (xy 167.783496 75.613579)))
    (arrow2a (pts (xy 125.73 76.2) (xy 126.856504 76.786421)))
    (arrow2b (pts (xy 125.73 76.2) (xy 126.856504 75.613579)))
  )
  (dimension 56.515 (width 0.3) (layer Dwgs.User)
    (gr_text "56.515 mm" (at 120.57 107.6325 90) (layer Dwgs.User))
    (feature1 (pts (xy 127 79.375) (xy 119.22 79.375)))
    (feature2 (pts (xy 127 135.89) (xy 119.22 135.89)))
    (crossbar (pts (xy 121.92 135.89) (xy 121.92 79.375)))
    (arrow1a (pts (xy 121.92 79.375) (xy 122.506421 80.501504)))
    (arrow1b (pts (xy 121.92 79.375) (xy 121.333579 80.501504)))
    (arrow2a (pts (xy 121.92 135.89) (xy 122.506421 134.763496)))
    (arrow2b (pts (xy 121.92 135.89) (xy 121.333579 134.763496)))
  )
  (gr_line (start 125.73 80.645) (end 125.73 134.62) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 127 79.375) (end 125.73 80.645) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 167.64 79.375) (end 127 79.375) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 168.91 80.645) (end 167.64 79.375) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 168.91 134.62) (end 168.91 80.645) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 167.64 135.89) (end 168.91 134.62) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 127 135.89) (end 167.64 135.89) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 125.73 134.62) (end 127 135.89) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_text "Based on the design of G. Lancaster & P. Putnik" (at 141.605 117.475 90) (layer F.SilkS))
  (gr_text "for ZX Spectrum +2A/B & +3 with +3e ROM" (at 133.985 118.11 90) (layer F.SilkS))
  (gr_text v.0.99a (at 158.115 93.98 90) (layer F.Cu))
  (gr_text "www.speccy.pl\nwww.worldofspectrum.org" (at 149.86 106.045 90) (layer F.SilkS))
  (gr_text "Z80 8-bit\nU-IDE" (at 156.845 99.695 90) (layer F.SilkS))
  (gr_text E (at 156.21 86.995) (layer F.SilkS))
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