(kicad_pcb (version 4) (host pcbnew 4.0.4+e1-6308~48~ubuntu16.04.1-stable)
  (general
    (links 15)
    (no_connects 0)
    (area 133.924999 93.399999 166.075001 117.600001)
    (thickness 1.6)
    (drawings 7)
    (tracks 57)
    (zones 0)
    (modules 7)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.6)
    (user_trace_width 0.4)
    (user_trace_width 0.6)
    (user_trace_width 0.8)
    (user_trace_width 1)
    (user_trace_width 1.5)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.35)
    (via_min_drill 0.35)
    (user_via 0.5 0.35)
    (user_via 0.6 0.4)
    (user_via 0.8 0.6)
    (user_via 1 0.8)
    (user_via 1.7 1.5)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 GND)
  (net 2 +3V3)
  (net 3 CS)
  (net 4 DI)
  (net 5 SCLK)
  (net 6 DO)
  (net 7 "Net-(R1-Pad1)")
  (net 8 "Net-(R2-Pad2)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +3V3)
    (add_net CS)
    (add_net DI)
    (add_net DO)
    (add_net GND)
    (add_net "Net-(R1-Pad1)")
    (add_net "Net-(R2-Pad2)")
    (add_net SCLK)
  )
  (module SquantorPcbOutline:SD_CARD_connector locked (layer F.Cu) (tedit 57FB8582)
    (at 163.2 106.13)
    (fp_text reference J1 (at -3.688 -6.816 90) (layer F.SilkS))
    (fp_text value SD_CARD_connector (at -3.942 1.82 270) (layer F.Fab))
    (pad 1 smd rect (at 0 -7.5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 3 CS))
    (pad 2 smd rect (at 0 -5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 4 DI))
    (pad 3 smd rect (at 0 -2.5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (pad 4 smd rect (at 0 0 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (pad 5 smd rect (at 0 2.5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 5 SCLK))
    (pad 6 smd rect (at 0 5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (pad 7 smd rect (at 0 7.5 90) (size 2 4) (layers F.Cu F.Paste F.Mask)
      (net 6 DO))
  )
  (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 57FD182A)
    (at 144.907 106.934 270)
    (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C1 (at 2.921 0 270) (layer F.SilkS))
    (fp_text value 1u (at 0 0 270) (layer F.Fab))
    (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 57FD182D)
    (at 142.875 106.934 270)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C2 (at 2.667 0 270) (layer F.SilkS))
    (fp_text value 100n (at -0.127 0 270) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 57FD1825)
    (at 138.303 99.187 90)
    (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0603")
    (attr smd)
    (fp_text reference R1 (at 2.413 0 90) (layer F.SilkS))
    (fp_text value 10K (at 0 0 90) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(R1-Pad1)"))
    (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (model Resistors_SMD.3dshapes/R_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 57FD183C)
    (at 137.033 111.887 90)
    (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0603")
    (attr smd)
    (fp_text reference R2 (at -2.413 0.127 90) (layer F.SilkS))
    (fp_text value 10k (at 0.127 0.127 90) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(R2-Pad2)"))
    (model Resistors_SMD.3dshapes/R_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module SquantorAtmel:AT45DBXXX (layer F.Cu) (tedit 580208DB)
    (at 138.938 105.537 270)
    (fp_text reference U1 (at 0.2 3.8 270) (layer F.SilkS))
    (fp_text value AT45DBXXX (at -5.334 -3.81 270) (layer F.Fab))
    (pad 3 smd rect (at -3.81 0.635 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(R1-Pad1)"))
    (pad 2 smd rect (at -3.81 -0.635 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 SCLK))
    (pad 1 smd rect (at -3.81 -1.905 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 DI))
    (pad 4 smd rect (at -3.81 1.905 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 CS))
    (pad 5 smd rect (at 3.81 1.905 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(R2-Pad2)"))
    (pad 6 smd rect (at 3.81 0.635 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 +3V3))
    (pad 7 smd rect (at 3.81 -0.635 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 GND))
    (pad 8 smd rect (at 3.81 -1.905 270) (size 1.3 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 DO))
  )
  (module Symbols:OSHW-Logo2_9.8x8mm_SilkScreen (layer B.Cu) (tedit 0)
    (at 141.859 105.156 270)
    (descr "Open Source Hardware Symbol")
    (tags "Logo Symbol OSHW")
    (attr virtual)
    (fp_text reference REF*** (at 0 0 270) (layer B.SilkS) hide)
    (fp_text value OSHW-Logo2_9.8x8mm_SilkScreen (at 0.75 0 270) (layer B.Fab) hide)
  )
  (gr_text V2016.10.15 (at 136.525 104.14 90) (layer B.SilkS))
  (gr_line (start 134 93.5) (end 134 117.5) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 162 93.5) (end 134 93.5) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 166 97.5) (end 162 93.5) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 166 117.5) (end 166 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 134 117.5) (end 166 117.5) (angle 90) (layer Edge.Cuts) (width 0.15))
  (zone (net 1) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 147.32 116.84) (xy 134.62 116.84) (xy 134.62 93.98) (xy 147.32 93.98)
      )
    )
  )
  (zone (net 1) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 134.62 93.98) (xy 147.32 93.98) (xy 147.32 116.84) (xy 134.62 116.84)
      )
    )
  )
)
