(kicad_pcb (version 20171130) (host pcbnew "(5.1.7)-1")
  (general
    (thickness 1.6)
    (drawings 862)
    (tracks 0)
    (zones 0)
    (modules 8)
    (nets 1)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.15)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010f0_80000001)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory "gerbers/"))
  )
  (net 0 "")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module LOGO (layer F.Cu) (tedit 0)
    (at 62.23 58.42)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 0)
    (at 60.429333 27.171576)
    (fp_text reference "" (at 0 0) (layer F.SilkS))
    (fp_text value "" (at 0 0) (layer F.SilkS))
    (pad 1 thru_hole circle (at 0 0) (size 3.719199 3.719199) (drill 3.719199) (layers *.Cu *.Mask))
  )
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