| Rule Violations |
Count |
| Clearance Constraint (Gap=0.127mm) (All),(All) |
0 |
| Clearance Constraint (Gap=0.127mm) ((InNet('NetJ3_1') OR InNet('NetJ4_1') OR InNet('NetJ5_1') OR InNet('NetJ6_1') )),(All) |
0 |
| Clearance Constraint (Gap=0.254mm) (InPolygon),(All) |
0 |
| Short-Circuit Constraint (Allowed=No) (All),(All) |
0 |
| Un-Routed Net Constraint ( (All) ) |
0 |
| Modified Polygon (Allow modified: No), (Allow shelved: No) |
0 |
| Width Constraint (Min=0.254mm) (Max=0.762mm) (Preferred=0.508mm) (InNetClass('3V3')) |
0 |
| Width Constraint (Min=0.152mm) (Max=10.16mm) (Preferred=0.203mm) (All) |
0 |
| Width Constraint (Min=0.254mm) (Max=0.762mm) (Preferred=0.508mm) (InNet('GND')) |
0 |
| Width Constraint (Min=0.508mm) (Max=1.016mm) (Preferred=0.762mm) (InNetClass('Power')) |
0 |
| Power Plane Connect Rule(Relief Connect )(Expansion=0.102mm) (Conductor Width=0.152mm) (Air Gap=0.152mm) (Entries=4) (All) |
0 |
| Minimum Annular Ring (Minimum=0.102mm) (All) |
38 |
| Hole Size Constraint (Min=0.254mm) (Max=6.731mm) (All) |
0 |
| Hole To Hole Clearance (Gap=0.254mm) (All),(All) |
0 |
| Minimum Solder Mask Sliver (Gap=0mm) (All),(All) |
0 |
| Silk To Solder Mask (Clearance=0.127mm) (IsPad),(All) |
5 |
| Silk to Silk (Clearance=0mm) (All),(All) |
0 |
| Net Antennae (Tolerance=0mm) (All) |
0 |
| Board Clearance Constraint (Gap=0mm) (All) |
0 |
| Room Atenuador (Bounding Region = (58.227mm, 9.05mm, 129.127mm, 111.65mm) (InComponentClass('Atenuador')) |
0 |
| Room Designator (Bounding Region = (54.502mm, 74.525mm, 175.602mm, 158.175mm) (InComponentClass('Designator')) |
0 |
| Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) |
0 |
| Total |
43 |
