(kicad_pcb (version 20171130) (host pcbnew "(5.1.8)-1")
  (general
    (thickness 1.6)
    (drawings 10)
    (tracks 185)
    (zones 0)
    (modules 10)
    (nets 29)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.15)
    (trace_clearance 0.2)
    (zone_clearance 0.2)
    (zone_45_only no)
    (trace_min 0.15)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.254)
    (user_via 0.5 0.254)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (grid_origin 151.1 102.8)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 +5V)
  (net 2 GND)
  (net 3 /RST)
  (net 4 /MOSI)
  (net 5 /SCK)
  (net 6 /MISO)
  (net 7 "Net-(SW1-Pad1)")
  (net 8 /SDA)
  (net 9 /SCL)
  (net 10 "Net-(U3-Pad1)")
  (net 11 "Net-(U3-Pad2)")
  (net 12 "Net-(BT1-Pad1)")
  (net 13 /1)
  (net 14 /2)
  (net 15 /7)
  (net 16 /8)
  (net 17 /9)
  (net 18 /10)
  (net 19 /12)
  (net 20 /13)
  (net 21 /14)
  (net 22 /23)
  (net 23 /24)
  (net 24 /25)
  (net 25 /26)
  (net 26 /30)
  (net 27 /31)
  (net 28 /32)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +5V)
    (add_net /1)
    (add_net /10)
    (add_net /12)
    (add_net /13)
    (add_net /14)
    (add_net /2)
    (add_net /23)
    (add_net /24)
    (add_net /25)
    (add_net /26)
    (add_net /30)
    (add_net /31)
    (add_net /32)
    (add_net /7)
    (add_net /8)
    (add_net /9)
    (add_net /MISO)
    (add_net /MOSI)
    (add_net /RST)
    (add_net /SCK)
    (add_net /SCL)
    (add_net /SDA)
    (add_net GND)
    (add_net "Net-(BT1-Pad1)")
    (add_net "Net-(SW1-Pad1)")
    (add_net "Net-(U3-Pad1)")
    (add_net "Net-(U3-Pad2)")
  )
  (module "MicroWordClockTut:NanoT BS" (layer F.Cu) (tedit 6041B76D)
    (at 124 101.25 270)
    (fp_text reference SW1 (at 4 0 90) (layer F.SilkS))
    (fp_text value SW_SPST_2PIN (at 0 -3.81 90) (layer F.Fab))
    (fp_text user "BOARD EDGE" (at 0.4 1.5 90) (layer F.Fab))
    (pad 2 smd rect (at 1.05 0 270) (size 0.45 0.7) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 1 smd rect (at -1.05 0 270) (size 0.45 0.7) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(SW1-Pad1)"))
  )
  (module "MicroWordClockTut:side connector" (layer F.Cu) (tedit 6040F53B)
    (at 133.62 115 180)
    (fp_text reference J2 (at -8.98 1.1) (layer F.SilkS))
    (fp_text value Conn_02x03_Male (at 0.02 -2) (layer F.Fab))
    (fp_text user "BOARD EDGE" (at 0 0) (layer F.Fab))
    (pad 2 thru_hole circle (at -3.81 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 6 thru_hole circle (at 6.35 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 5 thru_hole circle (at 3.81 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 4 /MOSI))
    (pad 4 thru_hole circle (at 1.27 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 6 /MISO))
    (pad 1 thru_hole circle (at -6.35 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 3 /RST))
    (pad 3 thru_hole circle (at -1.27 0 180) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
      (net 5 /SCK))
  )
  (module MicroWordClockTut:KWM-20882XVB (layer F.Cu) (tedit 603F05A3)
    (at 133.5 113.5 180)
    (fp_text reference U4 (at -8.75 16.25) (layer F.SilkS))
    (fp_text value 8x8_LED_MATRIX (at 9 9 90) (layer F.Fab))
    (fp_text user "PIN 16" (at -5.5 0) (layer F.Fab))
    (fp_text user "PIN 9" (at -6 17.5) (layer F.Fab))
    (fp_text user "PIN 8" (at 6 17.5) (layer F.Fab))
    (fp_text user "PIN 1" (at 5.5 0) (layer F.Fab))
    (pad R7 thru_hole circle (at -7.5 15 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 13 /1))
    (pad R5 thru_hole circle (at -7.5 10 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 27 /31))
    (pad C6 thru_hole circle (at -7.5 2.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 24 /25))
    (pad C7 thru_hole circle (at -7.5 5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 25 /26))
    (pad C8 thru_hole circle (at -7.5 7.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 26 /30))
    (pad C5 thru_hole circle (at -7.5 0 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 23 /24))
    (pad R6 thru_hole circle (at -7.5 12.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 28 /32))
    (pad R8 thru_hole circle (at -7.5 17.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 14 /2))
    (pad C4 thru_hole circle (at 7.5 17.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 15 /7))
    (pad C3 thru_hole circle (at 7.5 15 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 16 /8))
    (pad C2 thru_hole circle (at 7.5 12.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 17 /9))
    (pad C1 thru_hole circle (at 7.5 10 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 18 /10))
    (pad R4 thru_hole circle (at 7.5 7.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 19 /12))
    (pad R3 thru_hole circle (at 7.5 5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 20 /13))
    (pad R2 thru_hole circle (at 7.5 2.5 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 21 /14))
    (pad R1 thru_hole circle (at 7.5 0 180) (size 1.2 1.2) (drill 0.5) (layers *.Cu *.Mask)
      (net 22 /23))
  )
  (module MicroWordClockTut:10118192-0001LF (layer B.Cu) (tedit 60401626)
    (at 133.5 96)
    (fp_text reference J1 (at 0 9.525) (layer B.SilkS))
    (fp_text value USB_B_Micro (at 0 10.795) (layer B.Fab))
    (fp_text user "PCB EDGE LINE" (at 0 -2.286) (layer B.Fab))
    (pad 6 smd rect (at 4.445 2.55) (size 2.1 1.6) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 6 smd rect (at 4.7 0) (size 1.8 1.9) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 6 smd rect (at 1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 6 smd rect (at -1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 6 smd rect (at -4.7 0) (size 1.8 1.9) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 6 smd rect (at -4.445 2.55) (size 2.1 1.6) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 1 smd rect (at -1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at -0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask))
    (pad 4 smd rect (at 0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask))
    (pad 5 smd rect (at 1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 3 smd rect (at 0 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask))
  )
  (module "MicroWordClockTut:2-SMD XTAL CC7-T1A" (layer B.Cu) (tedit 6015A525)
    (at 138.25 103.5 270)
    (fp_text reference Y1 (at 3.5 0.085 180) (layer B.SilkS))
    (fp_text value Crystal (at 5.715 1.905 270) (layer B.Fab))
    (pad 2 smd rect (at 1.75 0 270) (size 1 1.8) (layers B.Cu B.Paste B.Mask)
      (net 11 "Net-(U3-Pad2)"))
    (pad 1 smd rect (at -1.75 0 270) (size 1 1.8) (layers B.Cu B.Paste B.Mask)
      (net 10 "Net-(U3-Pad1)"))
  )
  (module MicroWordClockTut:BR1225VCN locked (layer B.Cu) (tedit 603F0420)
    (at 133.5 111)
    (fp_text reference BT1 (at 3.25 -2.5 180) (layer B.SilkS))
    (fp_text value Battery_Cell (at 0.254 4.318 180) (layer B.Fab))
    (pad 2 thru_hole roundrect (at 1.525 1.5) (size 1 1) (drill 0.75) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 2 GND))
    (pad 1 thru_hole roundrect (at -1.525 -1.5) (size 1 1) (drill 0.75) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
      (net 12 "Net-(BT1-Pad1)"))
  )
  (module Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm (layer B.Cu) (tedit 58CD0CDA)
    (at 132.25 104.75 180)
    (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U3 (at 2.25 -3.505) (layer B.SilkS))
    (fp_text value DS1307Z+ (at 0 -3.5) (layer B.Fab))
    (fp_text user %R (at -0.355 0.005) (layer B.Fab))
    (pad 1 smd rect (at -2.7 1.905 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 10 "Net-(U3-Pad1)"))
    (pad 2 smd rect (at -2.7 0.635 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 11 "Net-(U3-Pad2)"))
    (pad 3 smd rect (at -2.7 -0.635 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 12 "Net-(BT1-Pad1)"))
    (pad 4 smd rect (at -2.7 -1.905 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 5 smd rect (at 2.7 -1.905 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 8 /SDA))
    (pad 6 smd rect (at 2.7 -0.635 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 9 /SCL))
    (pad 7 smd rect (at 2.7 0.635 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask))
    (pad 8 smd rect (at 2.7 1.905 180) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_QFP:TQFP-32_7x7mm_Pitch0.8mm (layer F.Cu) (tedit 58CC9A48)
    (at 133.75 102 270)
    (descr "32-Lead Plastic Thin Quad Flatpack (PT) - 7x7x1.0 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "QFP 0.8")
    (attr smd)
    (fp_text reference U1 (at 5 -4.25 90) (layer F.SilkS))
    (fp_text value ATmega328P-AU (at 0 6.05 90) (layer F.Fab))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 1 smd rect (at -4.25 -2.8 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 13 /1))
    (pad 2 smd rect (at -4.25 -2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 14 /2))
    (pad 3 smd rect (at -4.25 -1.2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 4 smd rect (at -4.25 -0.4 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 5 smd rect (at -4.25 0.4 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 6 smd rect (at -4.25 1.2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 7 smd rect (at -4.25 2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 15 /7))
    (pad 8 smd rect (at -4.25 2.8 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 16 /8))
    (pad 9 smd rect (at -2.8 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 17 /9))
    (pad 10 smd rect (at -2 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 18 /10))
    (pad 11 smd rect (at -1.2 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(SW1-Pad1)"))
    (pad 12 smd rect (at -0.4 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 19 /12))
    (pad 13 smd rect (at 0.4 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 20 /13))
    (pad 14 smd rect (at 1.2 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 21 /14))
    (pad 15 smd rect (at 2 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 4 /MOSI))
    (pad 16 smd rect (at 2.8 4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 6 /MISO))
    (pad 17 smd rect (at 4.25 2.8 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 5 /SCK))
    (pad 18 smd rect (at 4.25 2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask))
    (pad 19 smd rect (at 4.25 1.2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask))
    (pad 20 smd rect (at 4.25 0.4 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask))
    (pad 21 smd rect (at 4.25 -0.4 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 22 smd rect (at 4.25 -1.2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask))
    (pad 23 smd rect (at 4.25 -2 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 22 /23))
    (pad 24 smd rect (at 4.25 -2.8 270) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 23 /24))
    (pad 25 smd rect (at 2.8 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 24 /25))
    (pad 26 smd rect (at 2 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 25 /26))
    (pad 27 smd rect (at 1.2 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 8 /SDA))
    (pad 28 smd rect (at 0.4 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 9 /SCL))
    (pad 29 smd rect (at -0.4 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 3 /RST))
    (pad 30 smd rect (at -1.2 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 26 /30))
    (pad 31 smd rect (at -2 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 27 /31))
    (pad 32 smd rect (at -2.8 -4.25) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)
      (net 28 /32))
    (model ${KISYS3DMOD}/Housings_QFP.3dshapes/TQFP-32_7x7mm_Pitch0.8mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0805_HandSoldering (layer F.Cu) (tedit 58AA84A8)
    (at 133.75 95.75)
    (descr "Capacitor SMD 0805, hand soldering")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C2 (at -3 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.75) (layer F.Fab))
    (fp_text user %R (at 0 -1.75) (layer F.Fab))
    (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0805_HandSoldering (layer B.Cu) (tedit 58AA84A8)
    (at 132.25 100.5)
    (descr "Capacitor SMD 0805, hand soldering")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C1 (at 3.181981 0) (layer B.SilkS))
    (fp_text value C (at 0 -1.75) (layer B.Fab))
    (fp_text user %R (at 0 1.75) (layer B.Fab))
    (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text ~RST (at 139.5 112.9 90) (layer F.SilkS))
  (gr_text 5V (at 137.3 113.2 90) (layer F.SilkS))
  (gr_text SCK (at 134.9 112.6 90) (layer F.SilkS))
  (gr_text MISO (at 132.4 112.3 90) (layer F.SilkS))
  (gr_text MOSI (at 129.8 112.3 90) (layer F.SilkS))
  (gr_text G (at 127.7 113.6 90) (layer F.SilkS))
  (gr_line (start 123.25 115) (end 123.25 94.5) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 143.75 115) (end 123.25 115) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 143.75 94.5) (end 143.75 115) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 123.25 94.5) (end 143.75 94.5) (layer Edge.Cuts) (width 0.05))
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.2))
    (min_thickness 0.254)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 143.5 114.8) (xy 123.5 114.8) (xy 123.5 94.8) (xy 143.5 94.8)
      )
    )
  )
)
