(kicad_pcb (version 4) (host pcbnew 4.0.7-e2-6376~61~ubuntu18.04.1)
  (general
    (links 6)
    (no_connects 0)
    (area 0 0 0 0)
    (thickness 1.6)
    (drawings 4)
    (tracks 6)
    (zones 0)
    (modules 4)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.4)
    (user_trace_width 0.1524)
    (user_trace_width 0.2)
    (user_trace_width 0.3)
    (user_trace_width 0.4)
    (user_trace_width 0.6)
    (user_trace_width 1)
    (user_trace_width 1.5)
    (user_trace_width 2)
    (trace_clearance 0.1524)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.381)
    (via_drill 0.254)
    (via_min_size 0.381)
    (via_min_drill 0.254)
    (user_via 0.381 0.254)
    (user_via 0.55 0.4)
    (user_via 0.75 0.6)
    (user_via 0.95 0.8)
    (user_via 1.3 1)
    (user_via 1.5 1.2)
    (user_via 1.7 1.4)
    (user_via 1.9 1.6)
    (uvia_size 0.381)
    (uvia_drill 0.254)
    (uvias_allowed no)
    (uvia_min_size 0.381)
    (uvia_min_drill 0.254)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.1)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 VDD)
  (net 2 /SWDIO)
  (net 3 VSS)
  (net 4 /SWDCLK)
  (net 5 "Net-(J1-Pad6)")
  (net 6 "Net-(J1-Pad7)")
  (net 7 "Net-(J1-Pad8)")
  (net 8 "Net-(J1-Pad10)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.381)
    (via_drill 0.254)
    (uvia_dia 0.381)
    (uvia_drill 0.254)
    (add_net /SWDCLK)
    (add_net /SWDIO)
    (add_net "Net-(J1-Pad10)")
    (add_net "Net-(J1-Pad6)")
    (add_net "Net-(J1-Pad7)")
    (add_net "Net-(J1-Pad8)")
    (add_net VDD)
    (add_net VSS)
  )
  (module SquantorLabels:Label_version (layer F.Cu) (tedit 59D3ED5E)
    (at 135 99.4)
    (fp_text reference N2 (at 0 2) (layer F.Fab) hide)
    (fp_text value V20180629 (at -0.8 0) (layer F.SilkS))
  )
  (module SquantorConnectors:Header-Shr-0127-2X05-H006 (layer F.Cu) (tedit 5B3667ED)
    (at 135 96 180)
    (fp_text reference J1 (at 4.5 0 180) (layer F.SilkS))
    (fp_text value JTAG_2X05 (at 0 3.3 180) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at -2.54 0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 1 VDD))
    (pad 2 thru_hole circle (at -2.54 -0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 2 /SWDIO))
    (pad 3 thru_hole circle (at -1.27 0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 3 VSS))
    (pad 4 thru_hole circle (at -1.27 -0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 4 /SWDCLK))
    (pad 5 thru_hole circle (at 0 0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 3 VSS))
    (pad 6 thru_hole circle (at 0 -0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad6)"))
    (pad 7 thru_hole circle (at 1.27 0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad7)"))
    (pad 8 thru_hole circle (at 1.27 -0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad8)"))
    (pad 9 thru_hole circle (at 2.54 0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 3 VSS))
    (pad 10 thru_hole circle (at 2.54 -0.635 180) (size 0.75 0.75) (drill 0.6) (layers *.Cu *.Mask)
      (net 8 "Net-(J1-Pad10)"))
  )
  (module SquantorConnectors:Header-0254-1X04-H010 (layer F.Cu) (tedit 5B3668D0)
    (at 135 102 180)
    (descr "PIN HEADER")
    (tags "PIN HEADER")
    (attr virtual)
    (fp_text reference J2 (at 5.7 1.7 180) (layer F.SilkS))
    (fp_text value Conn_01x04 (at 0 2.413 180) (layer F.Fab) hide)
    (pad 1 thru_hole rect (at -3.81 0) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 1 VDD))
    (pad 2 thru_hole circle (at -1.27 0) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 2 /SWDIO))
    (pad 3 thru_hole circle (at 1.27 0) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 4 /SWDCLK))
    (pad 4 thru_hole circle (at 3.81 0) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 3 VSS))
  )
  (module SquantorOHW_logo:ohw-logo-OSHW_6X70_NOTEXT (layer F.Cu) (tedit 5B366AF0)
    (at 140.3 99.7)
    (attr virtual)
    (fp_text reference N1 (at 0 2) (layer F.Fab) hide)
    (fp_text value OHWLOGO (at 0 -2) (layer F.SilkS) hide)
  )
  (gr_line (start 128.3 103.7) (end 141.7 103.7) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 128.3 93.1) (end 128.3 103.7) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 141.7 93.1) (end 141.7 103.7) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 128.3 93.1) (end 141.7 93.1) (layer Edge.Cuts) (width 0.15))
  (zone (net 3) (net_name VSS) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 128.3 93.1) (xy 141.7 93.1) (xy 141.7 103.7) (xy 128.3 103.7)
      )
    )
  )
  (zone (net 1) (net_name VDD) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 128.3 93.1) (xy 141.7 93.1) (xy 141.7 103.7) (xy 128.3 103.7)
      )
    )
  )
)
