(kicad_pcb (version 20171130) (host pcbnew "(5.0.0)")
  (general
    (thickness 1.6)
    (drawings 20)
    (tracks 56)
    (zones 0)
    (modules 11)
    (nets 8)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user hide)
    (42 Eco1.User user hide)
    (43 Eco2.User user hide)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.5)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.5)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.5)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 "Net-(D1-Pad2)")
  (net 3 "Net-(D3-Pad2)")
  (net 4 "Net-(C1-Pad2)")
  (net 5 "Net-(J1-Pad1)")
  (net 6 "Net-(J2-Pad2)")
  (net 7 "Net-(SW1-Pad1)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.5)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (diff_pair_gap 0.25)
    (diff_pair_width 0.5)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C1-Pad2)")
    (add_net "Net-(D1-Pad2)")
    (add_net "Net-(D3-Pad2)")
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J2-Pad2)")
    (add_net "Net-(SW1-Pad1)")
  )
  (module Capacitor_THT:CP_Radial_D16.0mm_P7.50mm (layer F.Cu) (tedit 5AE50EF1)
    (at 74.13 43.44 270)
    (descr "CP, Radial series, Radial, pin pitch=7.50mm, , diameter=16mm, Electrolytic Capacitor")
    (tags "CP Radial series Radial pin pitch 7.50mm  diameter 16mm Electrolytic Capacitor")
    (fp_text reference C1 (at 2.49 5.59) (layer F.SilkS))
    (fp_text value 4700uF (at 3.75 9.25 270) (layer F.Fab))
    (fp_text user %R (at 3.75 0 270) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole circle (at 7.5 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 4 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/CP_Radial_D16.0mm_P7.50mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
    (at 47.24 35.16 90)
    (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x02 2.54mm single row")
    (fp_text reference J1 (at 1.18 -1.84 270) (layer F.SilkS))
    (fp_text value PWR (at -0.22 6.44 180) (layer F.Fab))
    (fp_text user %R (at 0 1.27 180) (layer F.Fab))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(C1-Pad2)"))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad1)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module LED_THT:LED_D3.0mm (layer F.Cu) (tedit 587A3A7B)
    (at 49.09 58.66 180)
    (descr "LED, diameter 3.0mm, 2 pins")
    (tags "LED diameter 3.0mm 2 pins")
    (fp_text reference D1 (at -0.62 -2.22 180) (layer F.SilkS))
    (fp_text value Fault (at 1.27 2.96 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole circle (at 2.54 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 2 "Net-(D1-Pad2)"))
    (model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D3.0mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal (layer F.Cu) (tedit 5DA5B83E)
    (at 63.5 51.38 90)
    (descr "Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf")
    (tags "Diode DO-41_SOD81 series Axial Horizontal pin pitch 10.16mm  length 5.2mm diameter 2.7mm")
    (fp_text reference D2 (at 5.42 0.01 90) (layer F.SilkS))
    (fp_text value 1N4001 (at 5.08 2.47 90) (layer F.Fab))
    (fp_text user %R (at 5.47 0 90) (layer F.Fab))
    (fp_text user K (at 0 -2.1 90) (layer F.Fab))
    (fp_text user K (at 4.05 -1 180) (layer F.SilkS) hide)
    (pad 1 thru_hole rect (at 0 0 90) (size 2.2 2.2) (drill 1.1) (layers *.Cu *.Mask)
      (net 2 "Net-(D1-Pad2)"))
    (pad 2 thru_hole oval (at 10.16 0 90) (size 2.2 2.2) (drill 1.1) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-41_SOD81_P10.16mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module LED_THT:LED_D3.0mm (layer F.Cu) (tedit 587A3A7B)
    (at 54.33 58.66 180)
    (descr "LED, diameter 3.0mm, 2 pins")
    (tags "LED diameter 3.0mm 2 pins")
    (fp_text reference D3 (at 2.98 1.95 180) (layer F.SilkS))
    (fp_text value Charge (at 1.27 2.96 180) (layer F.Fab))
    (pad 2 thru_hole circle (at 2.54 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 3 "Net-(D3-Pad2)"))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 4 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D3.0mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
    (at 56.34 35.17 90)
    (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x02 2.54mm single row")
    (fp_text reference J2 (at 1.03 -1.85 270) (layer F.SilkS))
    (fp_text value Clock (at -0.24 6.85 180) (layer F.Fab))
    (fp_text user %R (at 0 1.27 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(C1-Pad2)"))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 "Net-(J2-Pad2)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5AE5139B)
    (at 47.89 54.42 90)
    (descr "Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=15.24mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf")
    (tags "Resistor Axial_DIN0414 series Axial Horizontal pin pitch 15.24mm 2W length 11.9mm diameter 4.5mm")
    (fp_text reference R1 (at 7.76 0.22 90) (layer F.SilkS))
    (fp_text value 470R (at 7.62 3.37 90) (layer F.Fab))
    (fp_text user %R (at 7.62 0 90) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 90) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 2 "Net-(D1-Pad2)"))
    (pad 2 thru_hole oval (at 15.24 0 90) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5AE5139B)
    (at 53.87 39.21 270)
    (descr "Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=15.24mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf")
    (tags "Resistor Axial_DIN0414 series Axial Horizontal pin pitch 15.24mm 2W length 11.9mm diameter 4.5mm")
    (fp_text reference R2 (at 7.74 -0.09 270) (layer F.SilkS))
    (fp_text value 68R (at 7.62 3.37 270) (layer F.Fab))
    (fp_text user %R (at 7.62 0 270) (layer F.Fab))
    (pad 2 thru_hole oval (at 15.24 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 2 "Net-(D1-Pad2)"))
    (pad 1 thru_hole circle (at 0 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_THT:R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal (layer F.Cu) (tedit 5AE5139B)
    (at 59.18 54.04 90)
    (descr "Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm")
    (fp_text reference R3 (at 7.09 0.05 90) (layer F.SilkS))
    (fp_text value 12K (at 7.62 2.72 90) (layer F.Fab))
    (fp_text user %R (at 7.62 0 90) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(D3-Pad2)"))
    (pad 2 thru_hole oval (at 15.24 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Button_Switch_THT:SW_CuK_JS202011CQN_DPDT_Straight (layer F.Cu) (tedit 5A02FE31)
    (at 59.56 56.71)
    (descr "CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf")
    (tags "switch DPDT")
    (fp_text reference SW1 (at 2.51 -2.46 90) (layer F.SilkS))
    (fp_text value SW_DPDT_x2 (at 3 5) (layer F.Fab))
    (fp_text user %R (at 2 1.65) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)
      (net 7 "Net-(SW1-Pad1)"))
    (pad 2 thru_hole circle (at 2.5 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 3 thru_hole circle (at 5 0) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask)
      (net 6 "Net-(J2-Pad2)"))
    (pad 4 thru_hole circle (at 0 3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask))
    (pad 5 thru_hole circle (at 2.5 3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask))
    (pad 6 thru_hole circle (at 5 3.3) (size 1.4 1.4) (drill 0.9) (layers *.Cu *.Mask))
    (model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_CuK_JS202011CQN_DPDT_Straight.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
    (at 64.93 34.85)
    (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x02 2.54mm single row")
    (fp_text reference J3 (at -2.4 3.48 90) (layer F.SilkS))
    (fp_text value Ext.Cap (at 0 4.87) (layer F.Fab))
    (fp_text user %R (at 0 1.27 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text ExtC1 (at 66.05 40.93 90) (layer F.SilkS))
  (gr_text - (at 66.89 37.29) (layer F.SilkS))
  (gr_text + (at 66.81 34.77) (layer F.SilkS))
  (gr_text "Cut along line and connect C1 to\nJ3 for remote capacitor option" (at 69.81 34.05 90) (layer B.SilkS))
  (gr_text "CLK\nPWR" (at 65.35 54.25) (layer F.SilkS))
  (gr_text Charge (at 56.35 58.68 90) (layer F.SilkS))
  (gr_text Fault (at 44.82 59.12 90) (layer F.SilkS))
  (gr_text - (at 56.29 32.84) (layer F.SilkS))
  (gr_text + (at 58.95 32.81) (layer F.SilkS))
  (gr_text - (at 49.97 32.87) (layer F.SilkS))
  (gr_text + (at 47.2 32.87) (layer F.SilkS))
  (gr_text CLK (at 61.16 35.14 90) (layer F.SilkS))
  (gr_text PWR (at 52.09 35.24 90) (layer F.SilkS))
  (gr_text "v1.0 bob_rich\nlotuselan.net" (at 74.72 59.33) (layer F.SilkS))
  (gr_text "Kienzle Clock\nProtection Circuit" (at 67.75 35.33) (layer F.SilkS))
  (gr_line (start 43.96 61.64) (end 82.63 61.64) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 43.96 61.64) (end 43.96 31.98) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 82.63 31.99) (end 82.63 61.64) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 43.96 31.99) (end 82.63 31.99) (layer Edge.Cuts) (width 0.15))
)
