(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3")
  (general
    (thickness 1.6)
    (drawings 284)
    (tracks 463)
    (zones 0)
    (modules 35)
    (nets 57)
  )
  (page A4)
  (layers
    (0 Top signal)
    (31 Bottom signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.2)
    (user_trace_width 0.2032)
    (trace_clearance 0.1524)
    (zone_clearance 0.000001)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.016 1.016)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0.0508)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 GND)
  (net 2 VSW)
  (net 3 "Net-(C1-Pad1)")
  (net 4 /AREF)
  (net 5 /VDD)
  (net 6 /VDDANA)
  (net 7 /VUSB)
  (net 8 /USBD-)
  (net 9 /USBD+)
  (net 10 "Net-(J1-PadP4)")
  (net 11 /VHI)
  (net 12 "Net-(SW1-Pad5)")
  (net 13 "Net-(SW1-Pad2)")
  (net 14 "Net-(C4-Pad2)")
  (net 15 "Net-(SW2-Pad5)")
  (net 16 "Net-(SW2-Pad4)")
  (net 17 /BUTTON_D6)
  (net 18 /~RESET)
  (net 19 /DOTSTAR_DATA)
  (net 20 /D14)
  (net 21 /A6)
  (net 22 /DOTSTAR_CLK)
  (net 23 /SWDIO)
  (net 24 /SWCLK)
  (net 25 "Net-(U1-Pad39)")
  (net 26 /MISO)
  (net 27 /MOSI)
  (net 28 "Net-(U1-Pad32)")
  (net 29 "Net-(U1-Pad31)")
  (net 30 /D5)
  (net 31 /D4)
  (net 32 /D3)
  (net 33 "Net-(U1-Pad27)")
  (net 34 /TX_D1)
  (net 35 /RX_D0)
  (net 36 "Net-(U1-Pad23)")
  (net 37 /SCL)
  (net 38 /SDA)
  (net 39 /QSPI_CS)
  (net 40 /QSPI_SCK)
  (net 41 /QSPI_DATA[3])
  (net 42 /QSPI_DATA[2])
  (net 43 /QSPI_DATA[1])
  (net 44 /QSPI_DATA[0])
  (net 45 /A5)
  (net 46 /A4)
  (net 47 /A3)
  (net 48 /A2)
  (net 49 /A1)
  (net 50 /A0)
  (net 51 /SCK)
  (net 52 /BAT)
  (net 53 "Net-(VREG1-Pad4)")
  (net 54 "Net-(RGB1-Pad1)")
  (net 55 "Net-(RGB1-Pad2)")
  (net 56 "Net-(LED1-PadA)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /A0)
    (add_net /A1)
    (add_net /A2)
    (add_net /A3)
    (add_net /A4)
    (add_net /A5)
    (add_net /A6)
    (add_net /AREF)
    (add_net /BAT)
    (add_net /BUTTON_D6)
    (add_net /D14)
    (add_net /D3)
    (add_net /D4)
    (add_net /D5)
    (add_net /DOTSTAR_CLK)
    (add_net /DOTSTAR_DATA)
    (add_net /MISO)
    (add_net /MOSI)
    (add_net /QSPI_CS)
    (add_net /QSPI_DATA[0])
    (add_net /QSPI_DATA[1])
    (add_net /QSPI_DATA[2])
    (add_net /QSPI_DATA[3])
    (add_net /QSPI_SCK)
    (add_net /RX_D0)
    (add_net /SCK)
    (add_net /SCL)
    (add_net /SDA)
    (add_net /SWCLK)
    (add_net /SWDIO)
    (add_net /TX_D1)
    (add_net /USBD+)
    (add_net /USBD-)
    (add_net /VDD)
    (add_net /VDDANA)
    (add_net /VHI)
    (add_net /VUSB)
    (add_net /~RESET)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C4-Pad2)")
    (add_net "Net-(J1-PadP4)")
    (add_net "Net-(LED1-PadA)")
    (add_net "Net-(RGB1-Pad1)")
    (add_net "Net-(RGB1-Pad2)")
    (add_net "Net-(SW1-Pad2)")
    (add_net "Net-(SW1-Pad5)")
    (add_net "Net-(SW2-Pad4)")
    (add_net "Net-(SW2-Pad5)")
    (add_net "Net-(U1-Pad23)")
    (add_net "Net-(U1-Pad27)")
    (add_net "Net-(U1-Pad31)")
    (add_net "Net-(U1-Pad32)")
    (add_net "Net-(U1-Pad39)")
    (add_net "Net-(VREG1-Pad4)")
    (add_net VSW)
  )
  (module MINI_SAM_D51_r025_b001:3mm_hole (layer Top) (tedit 5EAB0605)
    (at 158.877 112.1283)
    (fp_text reference REF** (at 0 2.54) (layer F.SilkS))
    (fp_text value 3mm_hole (at 0 -2.54) (layer F.Fab))
    (pad "" np_thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers *.Cu *.Mask))
  )
  (module MINI_SAM_D51_r025_b001:3mm_hole (layer Top) (tedit 5EAB0605)
    (at 138.1252 112.1283)
    (fp_text reference REF** (at 0 2.54) (layer F.SilkS))
    (fp_text value 3mm_hole (at 0 -2.54) (layer F.Fab))
    (pad "" np_thru_hole circle (at 0 0) (size 3 3) (drill 3) (layers *.Cu *.Mask))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 142.8011 108.911409 225)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C1 (at 1.555635 -0.212132) (layer F.SilkS) hide)
    (fp_text value 4.7µF (at -0.9525 0.9525 225) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508 315) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 315) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 3 "Net-(C1-Pad1)") (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 151.5011 114.661409 270)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C5 (at -1.3 0) (layer F.SilkS) hide)
    (fp_text value 0.1µF (at -0.9525 0.9525 270) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 4 /AREF) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 143.8011 109.911409 225)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference C2 (at 1.484924 0.212132) (layer F.SilkS) hide)
    (fp_text value 10µF (at -0.9525 0.9525 225) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508 315) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 315) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 153.2011 109.911409 315)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C8 (at 1.558579 -0.212131) (layer F.SilkS) hide)
    (fp_text value 10µF (at -0.9525 0.9525 315) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508 45) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 45) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 315) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 315) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 6 /VDDANA) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 144.8011 110.911409 225)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference C3 (at 1.476778 0.318196) (layer F.SilkS) hide)
    (fp_text value 0.1µF (at -0.9525 0.9525 225) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508 315) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 315) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 225) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_INDUCTOR (layer Top) (tedit 0)
    (at 154.2011 108.911409 135)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference FB1 (at -1.626346 -0.141421) (layer F.SilkS) hide)
    (fp_text value "Impedence: 50 ohm @ 20 MHz, 220 Ohm @ 100 MHz; low DC resistance" (at -0.9525 0.9525 135) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0254 225) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 225) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 135) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 6 /VDDANA) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 135) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 152.2011 110.911409 315)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C7 (at 1.449569 -0.318198) (layer F.SilkS) hide)
    (fp_text value 0.1µF (at -0.9525 0.9525 315) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508 45) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 45) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 315) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 315) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 6 /VDDANA) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 153.0011 114.661409 270)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C6 (at -1.3 0) (layer F.SilkS) hide)
    (fp_text value 4.7µF (at -0.9525 0.9525 270) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 4 /AREF) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:MOLEX_47346-1001 (layer Bottom) (tedit 0)
    (at 148.5011 88.411409 180)
    (attr smd)
    (fp_text reference J1 (at -3.81 3.175 180) (layer B.SilkS) hide)
    (fp_text value MOLEX_47346-100147346 (at -3.81 -4.445 180) (layer B.Fab) hide)
    (pad P1 smd rect (at 1.3 -2.66 90) (size 1.38 0.45) (layers Bottom B.Paste B.Mask)
      (net 7 /VUSB) (solder_mask_margin 0.0635))
    (pad P2 smd rect (at 0.65 -2.66 90) (size 1.38 0.45) (layers Bottom B.Paste B.Mask)
      (net 8 /USBD-) (solder_mask_margin 0.0635))
    (pad P3 smd rect (at 0 -2.66 90) (size 1.38 0.45) (layers Bottom B.Paste B.Mask)
      (net 9 /USBD+) (solder_mask_margin 0.0635))
    (pad P4 smd rect (at -0.65 -2.66 90) (size 1.38 0.45) (layers Bottom B.Paste B.Mask)
      (net 10 "Net-(J1-PadP4)") (solder_mask_margin 0.0635))
    (pad P5 smd rect (at -1.3 -2.66 90) (size 1.38 0.45) (layers Bottom B.Paste B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad PAD1 smd rect (at -2.9125 0 90) (size 1.9 2.375) (layers Bottom B.Paste B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad PAD4 smd rect (at 2.9125 0 90) (size 1.9 2.375) (layers Bottom B.Paste B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad PAD3 smd rect (at 0.8375 0 90) (size 1.9 1.175) (layers Bottom B.Paste B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad PAD2 smd rect (at -0.8375 0 90) (size 1.9 1.175) (layers Bottom B.Paste B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Bottom) (tedit 0)
    (at 148.5011 107.711409)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference C10 (at 2.2 0 -90) (layer B.SilkS) hide)
    (fp_text value 10µF (at -0.9525 -0.9525) (layer B.Fab) hide)
    (fp_text user 2 (at 0.762 0.0508 -90) (layer Cmts.User))
    (fp_text user 1 (at -0.762 0.0508 -90) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Bottom) (tedit 0)
    (at 148.5011 102.011409 180)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference C9 (at -2.2 0 270) (layer B.SilkS) hide)
    (fp_text value 10µF (at -0.9525 -0.9525 180) (layer B.Fab) hide)
    (fp_text user 2 (at 0.762 0.0508 90) (layer Cmts.User))
    (fp_text user 1 (at -0.762 0.0508 90) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 180) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 11 /VHI) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 180) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:KMS_SWITCH (layer Top) (tedit 0)
    (at 144.5761 123.561409)
    (fp_text reference SW1 (at -2.54 -3.81) (layer F.SilkS) hide)
    (fp_text value KMS233GLFG (at -2.54 -2.54) (layer F.Fab) hide)
    (pad 5 smd rect (at 2.05 0.8 270) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 12 "Net-(SW1-Pad5)") (solder_mask_margin 0.0635))
    (pad 4 smd rect (at 2.05 -0.8 270) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 3 smd rect (at 0 -1.425 180) (size 1.7 0.55) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 2 smd rect (at -2.05 -0.8 90) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 13 "Net-(SW1-Pad2)") (solder_mask_margin 0.0635))
    (pad 1 smd rect (at -2.05 0.8 90) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 14 "Net-(C4-Pad2)") (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:KMS_SWITCH (layer Top) (tedit 0)
    (at 152.4261 123.561409)
    (fp_text reference SW2 (at -2.54 -3.81) (layer F.SilkS) hide)
    (fp_text value KMS233GLFG (at -2.54 -2.54) (layer F.Fab) hide)
    (pad 5 smd rect (at 2.05 0.8 270) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 15 "Net-(SW2-Pad5)") (solder_mask_margin 0.0635))
    (pad 4 smd rect (at 2.05 -0.8 270) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 16 "Net-(SW2-Pad4)") (solder_mask_margin 0.0635))
    (pad 3 smd rect (at 0 -1.425 180) (size 1.7 0.55) (layers Top F.Paste F.Mask)
      (net 17 /BUTTON_D6) (solder_mask_margin 0.0635))
    (pad 2 smd rect (at -2.05 -0.8 90) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 17 /BUTTON_D6) (solder_mask_margin 0.0635))
    (pad 1 smd rect (at -2.05 0.8 90) (size 1 0.9) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Top) (tedit 0)
    (at 145.5011 114.661409 270)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference R1 (at -1.3 0) (layer F.SilkS) hide)
    (fp_text value 1KΩ (at -0.9525 0.9525 270) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 0) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 14 "Net-(C4-Pad2)") (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 18 /~RESET) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_CAPACITOR (layer Top) (tedit 0)
    (at 144.0011 114.661409 270)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference C4 (at -0.818609 0.5673) (layer F.SilkS) hide)
    (fp_text value 0.1µF (at -0.9525 0.9525 270) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 -0.0508) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 14 "Net-(C4-Pad2)") (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Top) (tedit 0)
    (at 147.0011 114.661409 270)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference R2 (at -1.3 0) (layer F.SilkS) hide)
    (fp_text value 10KΩ (at -0.9525 0.9525 270) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 0) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 270) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 18 /~RESET) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Top) (tedit 0)
    (at 150.0011 114.661409 90)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference R3 (at 1.3 0) (layer F.SilkS) hide)
    (fp_text value 10KΩ (at -0.9525 0.9525 90) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 0 180) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 180) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 90) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 17 /BUTTON_D6) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 90) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:OSHW-LOGO-S (layer Bottom) (tedit 0)
    (at 141.9511 100.761409 180)
    (descr "<h3>Open-Source Hardware (OSHW) Logo - Small - Silkscreen</h3>\n<p>Silkscreen logo for open-source hardware designs.</p>\n<p>Devices using:\n<ul><li>OSHW_LOGO</li></ul></p>")
    (fp_text reference U$3 (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value "" (at 0 0 180) (layer B.SilkS) hide)
  )
  (module MINI_SAM_D51_r025_b001:SOT23-5 (layer Bottom) (tedit 0)
    (at 148.5011 104.911409)
    (descr "<b>Small Outline Transistor</b>")
    (attr smd)
    (fp_text reference VREG1 (at 2.2 0 -90) (layer B.SilkS) hide)
    (fp_text value 3.3V (at -0.9525 -0.1905) (layer B.Fab) hide)
    (pad 5 smd roundrect (at -0.95 1.3001) (size 0.55 1.2) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 4 smd roundrect (at 0.95 1.3001) (size 0.55 1.2) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 53 "Net-(VREG1-Pad4)") (solder_mask_margin 0.0635))
    (pad 3 smd roundrect (at 0.95 -1.3001) (size 0.55 1.2) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 11 /VHI) (solder_mask_margin 0.0635))
    (pad 2 smd roundrect (at 0 -1.3001) (size 0.55 1.2) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.95 -1.3001) (size 0.55 1.2) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 11 /VHI) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:TQFN48_7MM (layer Top) (tedit 0)
    (at 148.5011 105.211409 45)
    (fp_text reference U1 (at -2.35 -4.4 45) (layer F.SilkS) hide)
    (fp_text value ATSAMD51G_TQFN48 (at -3 4.7 45) (layer F.Fab) hide)
    (pad 48 smd rect (at -3.475 2.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 19 /DOTSTAR_DATA) (solder_mask_margin 0.0635))
    (pad 36 smd rect (at -2.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 24 smd rect (at 3.475 -2.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 20 /D14) (solder_mask_margin 0.0635))
    (pad 12 smd rect (at 2.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 21 /A6) (solder_mask_margin 0.0635))
    (pad THERMAL smd rect (at 0 0 45) (size 4.7 4.7) (layers Top F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 47 smd rect (at -3.475 2.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 22 /DOTSTAR_CLK) (solder_mask_margin 0.0635))
    (pad 46 smd rect (at -3.475 1.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 23 /SWDIO) (solder_mask_margin 0.0635))
    (pad 45 smd rect (at -3.475 1.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 24 /SWCLK) (solder_mask_margin 0.0635))
    (pad 44 smd rect (at -3.475 0.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 43 smd rect (at -3.475 0.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 2 VSW) (solder_mask_margin 0.0635))
    (pad 42 smd rect (at -3.475 -0.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 41 smd rect (at -3.475 -0.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 3 "Net-(C1-Pad1)") (solder_mask_margin 0.0635))
    (pad 40 smd rect (at -3.475 -1.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 18 /~RESET) (solder_mask_margin 0.0635))
    (pad 39 smd rect (at -3.475 -1.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 25 "Net-(U1-Pad39)") (solder_mask_margin 0.0635))
    (pad 38 smd rect (at -3.475 -2.25 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 26 /MISO) (solder_mask_margin 0.0635))
    (pad 37 smd rect (at -3.475 -2.75 45) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 27 /MOSI) (solder_mask_margin 0.0635))
    (pad 35 smd rect (at -2.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 34 smd rect (at -1.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 9 /USBD+) (solder_mask_margin 0.0635))
    (pad 33 smd rect (at -1.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 8 /USBD-) (solder_mask_margin 0.0635))
    (pad 32 smd rect (at -0.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 28 "Net-(U1-Pad32)") (solder_mask_margin 0.0635))
    (pad 31 smd rect (at -0.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 29 "Net-(U1-Pad31)") (solder_mask_margin 0.0635))
    (pad 30 smd rect (at 0.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 30 /D5) (solder_mask_margin 0.0635))
    (pad 29 smd rect (at 0.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 31 /D4) (solder_mask_margin 0.0635))
    (pad 28 smd rect (at 1.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 32 /D3) (solder_mask_margin 0.0635))
    (pad 27 smd rect (at 1.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 33 "Net-(U1-Pad27)") (solder_mask_margin 0.0635))
    (pad 26 smd rect (at 2.25 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 34 /TX_D1) (solder_mask_margin 0.0635))
    (pad 25 smd rect (at 2.75 -3.475 315) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 35 /RX_D0) (solder_mask_margin 0.0635))
    (pad 23 smd rect (at 3.475 -2.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 36 "Net-(U1-Pad23)") (solder_mask_margin 0.0635))
    (pad 22 smd rect (at 3.475 -1.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 37 /SCL) (solder_mask_margin 0.0635))
    (pad 21 smd rect (at 3.475 -1.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 38 /SDA) (solder_mask_margin 0.0635))
    (pad 20 smd rect (at 3.475 -0.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 39 /QSPI_CS) (solder_mask_margin 0.0635))
    (pad 19 smd rect (at 3.475 -0.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 40 /QSPI_SCK) (solder_mask_margin 0.0635))
    (pad 18 smd rect (at 3.475 0.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 17 smd rect (at 3.475 0.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 16 smd rect (at 3.475 1.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 41 /QSPI_DATA[3]) (solder_mask_margin 0.0635))
    (pad 15 smd rect (at 3.475 1.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 42 /QSPI_DATA[2]) (solder_mask_margin 0.0635))
    (pad 14 smd rect (at 3.475 2.25 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 43 /QSPI_DATA[1]) (solder_mask_margin 0.0635))
    (pad 13 smd rect (at 3.475 2.75 225) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 44 /QSPI_DATA[0]) (solder_mask_margin 0.0635))
    (pad 11 smd rect (at 2.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 45 /A5) (solder_mask_margin 0.0635))
    (pad 10 smd rect (at 1.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 46 /A4) (solder_mask_margin 0.0635))
    (pad 9 smd rect (at 1.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 47 /A3) (solder_mask_margin 0.0635))
    (pad 8 smd rect (at 0.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 48 /A2) (solder_mask_margin 0.0635))
    (pad 7 smd rect (at 0.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 49 /A1) (solder_mask_margin 0.0635))
    (pad 6 smd rect (at -0.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 6 /VDDANA) (solder_mask_margin 0.0635))
    (pad 5 smd rect (at -0.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 4 smd rect (at -1.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 4 /AREF) (solder_mask_margin 0.0635))
    (pad 3 smd rect (at -1.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 50 /A0) (solder_mask_margin 0.0635))
    (pad 2 smd rect (at -2.25 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 51 /SCK) (solder_mask_margin 0.0635))
    (pad 1 smd rect (at -2.75 3.475 135) (size 0.75 0.25) (layers Top F.Paste F.Mask)
      (net 17 /BUTTON_D6) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:APA102_2020 (layer Top) (tedit 0)
    (at 145.0011 118.211409 90)
    (fp_text reference RGB1 (at -1 -1.3 90) (layer F.SilkS) hide)
    (fp_text value AP102-2020 (at -0.000004 1.4 90) (layer F.Fab))
    (pad 1 smd rect (at -0.95 0.75 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 54 "Net-(RGB1-Pad1)") (solder_mask_margin 0.0635))
    (pad 2 smd rect (at -0.95 0 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 55 "Net-(RGB1-Pad2)") (solder_mask_margin 0.0635))
    (pad 3 smd rect (at -0.95 -0.75 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 4 smd rect (at 0.95 -0.75 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 5 smd rect (at 0.95 0 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 22 /DOTSTAR_CLK) (solder_mask_margin 0.0635))
    (pad 6 smd rect (at 0.95 0.75 270) (size 0.7 0.35) (layers Top F.Paste F.Mask)
      (net 19 /DOTSTAR_DATA) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:USON8 (layer Top) (tedit 0)
    (at 153.1511 101.561409 135)
    (fp_text reference U2 (at 0 0 135) (layer F.SilkS) hide)
    (fp_text value "QSPI NOR FLASH 2MiB 2x3mm USON (W25Q16JVUXIM)" (at 0 0 135) (layer F.SilkS) hide)
    (pad 8 smd rect (at 1.25 -0.75 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 7 smd rect (at 1.25 -0.25 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 41 /QSPI_DATA[3]) (solder_mask_margin 0.0635))
    (pad 6 smd rect (at 1.25 0.25 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 40 /QSPI_SCK) (solder_mask_margin 0.0635))
    (pad 5 smd rect (at 1.25 0.75 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 44 /QSPI_DATA[0]) (solder_mask_margin 0.0635))
    (pad 4 smd rect (at -1.25 0.75 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad 3 smd rect (at -1.25 0.25 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 42 /QSPI_DATA[2]) (solder_mask_margin 0.0635))
    (pad 2 smd rect (at -1.25 -0.25 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 43 /QSPI_DATA[1]) (solder_mask_margin 0.0635))
    (pad 1 smd rect (at -1.25 -0.75 225) (size 0.3 0.5) (layers Top F.Paste F.Mask)
      (net 39 /QSPI_CS) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Top) (tedit 0)
    (at 154.5011 100.211409 135)
    (descr "<b>0603 MicroPitch</b>")
    (fp_text reference R4 (at -0.785974 0.56429 135) (layer F.SilkS) hide)
    (fp_text value 100kΩ (at -0.9525 0.9525 135) (layer F.Fab) hide)
    (fp_text user 2 (at 0.762 0 225) (layer Cmts.User))
    (fp_text user 1 (at -0.762 -0.0508 225) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0 135) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 39 /QSPI_CS) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0 135) (size 0.8 0.8) (layers Top F.Paste F.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Bottom) (tedit 0)
    (at 148.5011 100.711409)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference R5 (at -0.9525 0.635) (layer B.SilkS) hide)
    (fp_text value 120Ω (at -0.9525 -0.9525) (layer B.Fab) hide)
    (fp_text user 2 (at 0.762 0 -90) (layer Cmts.User))
    (fp_text user 1 (at -0.762 0.0508 -90) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 20 /D14) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 56 "Net-(LED1-PadA)") (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:0603_RESISTOR (layer Bottom) (tedit 0)
    (at 148.5011 109.061409)
    (descr "<b>0603 MicroPitch</b>")
    (attr smd)
    (fp_text reference R6 (at 2.2 0 -90) (layer B.SilkS) hide)
    (fp_text value 1KΩ (at -0.9525 -0.9525) (layer B.Fab) hide)
    (fp_text user 2 (at 0.762 0 -90) (layer Cmts.User))
    (fp_text user 1 (at -0.762 0.0508 -90) (layer Cmts.User))
    (pad 2 smd roundrect (at 0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad 1 smd roundrect (at -0.762 0) (size 0.8 0.8) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 24 /SWCLK) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:SOD-123FL (layer Bottom) (tedit 0)
    (at 148.5011 95.861409)
    (attr smd)
    (fp_text reference D2 (at 0.95 -1.1) (layer B.SilkS) hide)
    (fp_text value MBR120 (at -1.1 -1.284) (layer B.Fab) hide)
    (fp_text user A (at 1.651 0) (layer Cmts.User))
    (fp_text user C (at -1.651 0) (layer Cmts.User))
    (pad C smd roundrect (at -1.6375 0) (size 0.91 1.22) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 11 /VHI) (solder_mask_margin 0.0635))
    (pad A smd roundrect (at 1.6375 0) (size 0.91 1.22) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 52 /BAT) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:SOD-123FL (layer Bottom) (tedit 0)
    (at 148.5011 93.561409 180)
    (attr smd)
    (fp_text reference D1 (at 0.9 3.1) (layer B.SilkS) hide)
    (fp_text value MBR120 (at -1.1 -1.284 180) (layer B.Fab) hide)
    (fp_text user A (at 1.651 0 180) (layer Cmts.User))
    (fp_text user C (at -1.651 0 180) (layer Cmts.User))
    (pad C smd roundrect (at -1.6375 0 180) (size 0.91 1.22) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 11 /VHI) (solder_mask_margin 0.0635))
    (pad A smd roundrect (at 1.6375 0 180) (size 0.91 1.22) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 7 /VUSB) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:REVERSE_MOUNT_LED (layer Bottom) (tedit 0)
    (at 148.5011 98.761409 180)
    (attr smd)
    (fp_text reference LED1 (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value VLRK31Q1R2-GS08 (at 0 0 180) (layer B.SilkS) hide)
    (fp_text user A (at 2.286 0 180) (layer Cmts.User))
    (fp_text user C (at -2.286 0 180) (layer Cmts.User))
    (pad C smd roundrect (at -2.3 0 180) (size 1 1.5) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad A smd roundrect (at 2.3 0 180) (size 1 1.5) (layers Bottom B.Paste B.Mask) (roundrect_rratio 0.125)
      (net 56 "Net-(LED1-PadA)") (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:1X8_HEADER_1.27MM (layer Top) (tedit 0)
    (at 142.1011 116.961409 267.8)
    (fp_text reference U$1 (at 0 0 267.8) (layer F.SilkS) hide)
    (fp_text value 1X8_HEADER_1.27MM (at 0 0 267.8) (layer F.SilkS) hide)
    (pad P$8 thru_hole circle (at 4.445 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 51 /SCK) (solder_mask_margin 0.0635))
    (pad P$7 thru_hole circle (at 3.175 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 26 /MISO) (solder_mask_margin 0.0635))
    (pad P$6 thru_hole circle (at 1.905 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 27 /MOSI) (solder_mask_margin 0.0635))
    (pad P$5 thru_hole circle (at 0.635 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 30 /D5) (solder_mask_margin 0.0635))
    (pad P$4 thru_hole circle (at -0.635 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 31 /D4) (solder_mask_margin 0.0635))
    (pad P$3 thru_hole circle (at -1.905 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 32 /D3) (solder_mask_margin 0.0635))
    (pad P$2 thru_hole circle (at -3.175 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 34 /TX_D1) (solder_mask_margin 0.0635))
    (pad P$1 thru_hole circle (at -4.445 0 267.8) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 35 /RX_D0) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:1X8_HEADER_1.27MM (layer Top) (tedit 0)
    (at 154.9011 116.961409 92.2)
    (fp_text reference U$2 (at 0 0 92.2) (layer F.SilkS) hide)
    (fp_text value 1X8_HEADER_1.27MM (at 0 0 92.2) (layer F.SilkS) hide)
    (pad P$8 thru_hole circle (at 4.445 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 21 /A6) (solder_mask_margin 0.0635))
    (pad P$7 thru_hole circle (at 3.175 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 45 /A5) (solder_mask_margin 0.0635))
    (pad P$6 thru_hole circle (at 1.905 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 46 /A4) (solder_mask_margin 0.0635))
    (pad P$5 thru_hole circle (at 0.635 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 47 /A3) (solder_mask_margin 0.0635))
    (pad P$4 thru_hole circle (at -0.635 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 48 /A2) (solder_mask_margin 0.0635))
    (pad P$3 thru_hole circle (at -1.905 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 49 /A1) (solder_mask_margin 0.0635))
    (pad P$2 thru_hole circle (at -3.175 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 4 /AREF) (solder_mask_margin 0.0635))
    (pad P$1 thru_hole circle (at -4.445 0 92.2) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 50 /A0) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:1X5_HEADER_1.27MM (layer Top) (tedit 5E2F2D0E)
    (at 138.0761 105.961409 258.5)
    (fp_text reference U$4 (at 0 0 258.5) (layer F.SilkS) hide)
    (fp_text value 1X5_HEADER_1.27MM (at 0 0 258.5) (layer F.SilkS) hide)
    (pad P$5 thru_hole circle (at 2.54 0 258.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
    (pad P$4 thru_hole circle (at 1.27 0 258.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 18 /~RESET) (solder_mask_margin 0.0635))
    (pad P$3 thru_hole circle (at 0 0 258.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad P$2 thru_hole circle (at -1.27 0 258.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 24 /SWCLK) (solder_mask_margin 0.0635))
    (pad P$1 thru_hole circle (at -2.54 0 258.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 23 /SWDIO) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:1X5_HEADER_1.27MM (layer Top) (tedit 0)
    (at 158.9261 105.961409 101.5)
    (fp_text reference U$5 (at 0 0 101.5) (layer F.SilkS) hide)
    (fp_text value 1X5_HEADER_1.27MM (at 0 0 101.5) (layer F.SilkS) hide)
    (pad P$5 thru_hole circle (at 2.54 0 101.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 37 /SCL) (solder_mask_margin 0.0635))
    (pad P$4 thru_hole circle (at 1.27 0 101.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 38 /SDA) (solder_mask_margin 0.0635))
    (pad P$3 thru_hole circle (at 0 0 101.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 5 /VDD) (solder_mask_margin 0.0635))
    (pad P$2 thru_hole circle (at -1.27 0 101.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 52 /BAT) (solder_mask_margin 0.0635))
    (pad P$1 thru_hole circle (at -2.54 0 101.5) (size 1.016 1.016) (drill 0.6) (layers *.Cu *.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (module MINI_SAM_D51_r025_b001:JST-2-SMD_NO_PASTE (layer Bottom) (tedit 0)
    (at 148.5011 117.611409)
    (descr "<h3>JST-Right Angle Male Header SMT</h3>\n<p>Specifications:\n<ul><li>Pin count: 2</li>\n<li>Pin pitch: 2mm</li>\n</ul></p>\n<p><a href=”http://www.4uconnector.com/online/object/4udrawing/20404.pdf”>Datasheet referenced for footprint</a></p>\n<p>Example device(s):\n<ul><li>CONN_02</li>\n<li>JST_2MM_MALE</li>\n</ul></p>")
    (fp_text reference BATT_CONN1 (at -0.003 -0.528) (layer B.SilkS) hide)
    (fp_text value CONN_02-JST-2MM-SMT (at -1.651 0.635) (layer B.Fab))
    (pad NC2 smd rect (at 3.4 1.5 270) (size 3.4 1.6) (layers Bottom B.Mask)
      (solder_mask_margin 0.0635))
    (pad NC1 smd rect (at -3.4 1.5 270) (size 3.4 1.6) (layers Bottom B.Mask)
      (solder_mask_margin 0.0635))
    (pad 2 smd rect (at 1 -3.7) (size 1 4.6) (layers Bottom B.Mask)
      (net 52 /BAT) (solder_mask_margin 0.0635))
    (pad 1 smd rect (at -1 -3.7) (size 1 4.6) (layers Bottom B.Mask)
      (net 1 GND) (solder_mask_margin 0.0635))
  )
  (gr_text RESET (at 144.5761 120.8) (layer F.SilkS))
  (gr_text "rev: 027\nbld: 001" (at 144.5011 124.461409) (layer B.SilkS))
  (gr_text BUTTON (at 152.4261 120.8) (layer F.SilkS))
  (gr_text MINI (at 152.0261 116.761409) (layer F.SilkS))
  (gr_text R5 (at 150.7011 100.661409 -90) (layer B.Fab))
  (gr_text minifigboards.com (at 145.415 111.633 -90) (layer B.SilkS))
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  (gr_line (start 143.1011 94.911409) (end 143.1011 89.211409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 153.9011 94.911409) (end 153.9011 89.211409) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 148.5011 90.627028) (end 143.4511 87.711409) (angle 120) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 146.659131 89.250783) (end 143.1011 89.211409) (angle 25) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 150.343068 89.250783) (end 153.9011 89.211409) (angle -25) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 145.294737 93.670583) (end 143.3511 95.411409) (angle -35) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 153.08923 94.817975) (end 153.6511 95.411409) (angle -40) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 151.707462 93.670583) (end 153.6511 95.411409) (angle 35) (layer Edge.Cuts) (width 0.1))
  (gr_text STATUS (at 143.7011 118.211409 90) (layer F.Mask))
  (gr_text D51 (at 151.80564 119.888) (layer F.Mask))
  (gr_arc (start 143.957329 98.135015) (end 143.819134 96.911409) (angle -63.435029) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 153.044867 98.135018) (end 154.2011 97.711409) (angle -63.434869) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 141.5011 112.211409) (end 141.0011 125.211409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 155.5011 112.211409) (end 156.0011 125.211409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 148.1011 125.211409) (end 148.1011 117.611409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 148.1011 117.611409) (end 148.9011 117.611409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 148.9011 117.611409) (end 148.9011 125.211409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 136.6011 108.811409) (end 137.440696 104.673825) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 147.175011 106.296215) (end 137.440696 104.673825) (angle 18.237135) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 138.437384 101.708959) (end 139.8011 99.111409) (layer Edge.Cuts) (width 0.1))
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  (gr_line (start 141.5011 112.211409) (end 141.5011 110.711409) (layer Edge.Cuts) (width 0.1))
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  (gr_line (start 155.9011 110.711409) (end 155.9011 110.011409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 136.73099 112.695034) (end 136.460704 113.966625) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 139.176359 113.214813) (end 138.906071 114.486403) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 138.113697 112.125421) (end 138.440187 110.666056) (angle -125) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 138.144873 112.132049) (end 138.440187 110.666056) (angle 125) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 137.357843 109.745919) (end 137.435809 109.379113) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 139.803212 110.265697) (end 139.881178 109.898891) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 138.07906 112.104919) (end 137.357843 109.745919) (angle -122) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 138.184853 112.127404) (end 139.803212 110.265697) (angle 122) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 157.827675 105.925136) (end 160.4011 108.811409) (angle 15) (layer Edge.Cuts) (width 0.1))
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  (gr_line (start 160.271209 112.695034) (end 160.541496 113.966625) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 157.82584 113.214813) (end 158.096128 114.486403) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 158.8885 112.125421) (end 158.562012 110.666056) (angle 125) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 158.857325 112.132049) (end 158.562012 110.666056) (angle -125) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 159.644356 109.745919) (end 159.56639 109.379113) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 157.198987 110.265697) (end 157.121021 109.898891) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 158.923138 112.104919) (end 159.644356 109.745919) (angle 122) (layer Edge.Cuts) (width 0.1))
  (gr_arc (start 158.817344 112.127404) (end 157.198987 110.265697) (angle -122) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 144.7011 96.911409) (end 143.819134 96.911409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 153.183065 96.911409) (end 152.3011 96.911409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 144.7011 96.911409) (end 144.7011 96.211409) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 152.3011 96.911409) (end 152.3011 96.211409) (layer Edge.Cuts) (width 0.1))
  (gr_text GND (at 158.6111 108.45) (layer B.SilkS))
  (gr_text 3V (at 158.2111 105.971409) (layer B.SilkS))
  (gr_text BAT (at 158.4711 107.206) (layer B.SilkS))
  (gr_text SDA (at 157.9611 104.721409) (layer B.SilkS))
  (gr_text SCL (at 157.6011 103.481409) (layer B.SilkS))
  (gr_text GND (at 138.3911 108.45) (layer B.SilkS))
  (gr_text ~RST~ (at 138.5511 107.206) (layer B.SilkS))
  (gr_text SWD (at 139.3111 103.481409) (layer B.SilkS))
  (gr_text SWC (at 139.0611 104.721409) (layer B.SilkS))
  (gr_text 3V (at 138.7911 105.971409) (layer B.SilkS))
  (gr_text RX (at 142.963 112.52) (layer B.SilkS))
  (gr_text TX (at 142.914 113.789) (layer B.SilkS))
  (gr_text D3 (at 142.865 115.058) (layer B.SilkS))
  (gr_text D4 (at 142.816 116.327) (layer B.SilkS))
  (gr_text D5 (at 142.767 117.596) (layer B.SilkS))
  (gr_text MO (at 142.718 118.865) (layer B.SilkS))
  (gr_text MI (at 142.669 120.134) (layer B.SilkS))
  (gr_text SCK (at 142.62 121.403) (layer B.SilkS))
  (gr_text A6 (at 154.039 112.52) (layer B.SilkS))
  (gr_text A5 (at 154.088 113.789) (layer B.SilkS))
  (gr_text A4 (at 154.137 115.058) (layer B.SilkS))
  (gr_text A3 (at 154.186 116.327) (layer B.SilkS))
  (gr_text A2 (at 154.235 117.596) (layer B.SilkS))
  (gr_text A1 (at 154.284 118.865) (layer B.SilkS))
  (gr_text AR (at 154.333 120.134) (layer B.SilkS))
  (gr_text A0/VOUT (at 154.382 121.403) (layer B.SilkS))
  (gr_text SAM (at 151.80564 118.618) (layer F.Mask))
  (gr_text SWD (at 139.3111 103.481409) (layer F.SilkS))
  (gr_text SWC (at 139.0611 104.721409) (layer F.SilkS))
  (gr_text 3V (at 138.7911 105.971409) (layer F.SilkS))
  (gr_text ~RST~ (at 138.5511 107.206) (layer F.SilkS))
  (gr_text GND (at 138.3911 108.461409) (layer F.SilkS))
  (gr_text GND (at 158.6111 108.461409) (layer F.SilkS))
  (gr_text 3V (at 158.2111 105.971409) (layer F.SilkS))
  (gr_text BAT (at 158.4711 107.211409) (layer F.SilkS))
  (gr_text SDA (at 157.9611 104.721409) (layer F.SilkS))
  (gr_text SCL (at 157.6011 103.481409) (layer F.SilkS))
  (gr_text MEM (at 154.7011 103.061409 45) (layer F.Fab))
  (gr_text µUSB (at 151.3011 92.311409) (layer B.Fab))
  (gr_text LED (at 151.4511 98.761409 -90) (layer B.Fab))
  (gr_text + (at 149.5011 110.661409) (layer B.SilkS))
  (gr_text - (at 147.5011 110.661409) (layer B.SilkS))
  (gr_text "Mini SAM\nM4" (at 152.5011 124.461409) (layer B.SilkS))
  (gr_line (start 154.2011 97.711409) (end 154.884843 97.711409) (layer Edge.Cuts) (width 0.1))
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  (gr_arc (start 142.117356 100.327497) (end 142.117356 97.711409) (angle -62.2995) (layer Edge.Cuts) (width 0.1))
  (zone (net 0) (net_name "") (layer Top) (hatch edge 0.508)
    (priority 6)
    (connect_pads (clearance 0.000001))
    (min_thickness 0.0254)
    (keepout (tracks not_allowed) (vias not_allowed) (copperpour not_allowed))
    (fill (arc_segments 32) (thermal_gap 0.05) (thermal_bridge_width 0.05))
    (polygon
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        (xy 147.7011 93.011409) (xy 147.3011 92.961409)
      )
    )
  )
  (zone (net 1) (net_name GND) (layer Top) (hatch edge 0.508)
    (priority 4)
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    )
  )
  (zone (net 1) (net_name GND) (layer Bottom) (hatch edge 0.508)
    (priority 4)
    (connect_pads (clearance 0.000001))
    (min_thickness 0.1016)
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  )
  (zone (net 5) (net_name /VDD) (layer Bottom) (hatch edge 0.508)
    (priority 6)
    (connect_pads (clearance 0.000001))
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      )
    )
  )
  (zone (net 0) (net_name "") (layer Top) (hatch edge 0.508)
    (priority 6)
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