GAIN1
GAIN0
GND
PWM+
PWM-
EN
3.3V
Rev2
DRV8662
Breakout
OUT-
OUT+
20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 1.00 mm body, 2.70 X 2.70 mm thermal pad
<p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 1.00 mm and thermal pad size 2.70 X 2.70 mm</p>
>NAME
>VALUE
20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 1.00 mm body, 2.70 X 2.70 mm thermal pad
<p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 1.00 mm and thermal pad size 2.70 X 2.70 mm</p>
CHIP, 1 X 0.5 X 0.35 mm body
<p>CHIP package with body size 1 X 0.5 X 0.35 mm</p>
>NAME
>VALUE
CHIP, 1 X 0.5 X 0.35 mm body
<p>CHIP package with body size 1 X 0.5 X 0.35 mm</p>
Single-row, 2-pin Pin Header (Male) Straight, 2.54 mm (0.10 in) col pitch, 5.84 mm mating length, 5.08 X 2.54 X 8.38 mm body
<p>Single-row (1X2), 2-pin Pin Header (Male) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.05 mm tail length and 5.84 mm mating length with overall size 5.08 X 2.54 X 8.38 mm, pin pattern - clockwise from top left</p>
>NAME
>VALUE
Single-row, 7-pin Pin Header (Male) Straight, 2.54 mm (0.10 in) col pitch, 5.84 mm mating length, 17.78 X 2.54 X 8.38 mm body
<p>Single-row (1X7), 7-pin Pin Header (Male) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.05 mm tail length and 5.84 mm mating length with overall size 17.78 X 2.54 X 8.38 mm, pin pattern - clockwise from top left</p>
>NAME
>VALUE
Single-row, 2-pin Pin Header (Male) Straight, 2.54 mm (0.10 in) col pitch, 5.84 mm mating length, 5.08 X 2.54 X 8.38 mm body
<p>Single-row (1X2), 2-pin Pin Header (Male) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.05 mm tail length and 5.84 mm mating length with overall size 5.08 X 2.54 X 8.38 mm, pin pattern - clockwise from top left</p>
Single-row, 7-pin Pin Header (Male) Straight, 2.54 mm (0.10 in) col pitch, 5.84 mm mating length, 17.78 X 2.54 X 8.38 mm body
<p>Single-row (1X7), 7-pin Pin Header (Male) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.05 mm tail length and 5.84 mm mating length with overall size 17.78 X 2.54 X 8.38 mm, pin pattern - clockwise from top left</p>
CHIP, 1 X 0.5 X 0.35 mm body
<p>CHIP package with body size 1 X 0.5 X 0.35 mm</p>
>NAME
>VALUE
CHIP, 1 X 0.5 X 0.35 mm body
<p>CHIP package with body size 1 X 0.5 X 0.35 mm</p>
CHIP, 1 X 0.5 X 0.55 mm body
<p>CHIP package with body size 1 X 0.5 X 0.55 mm</p>
>NAME
>VALUE
CHIP, 2 X 1.25 X 0.95 mm body
<p>CHIP package with body size 2 X 1.25 X 0.95 mm</p>
>NAME
>VALUE
CHIP, 1.6 X 0.8 X 0.95 mm body
<p>CHIP package with body size 1.6 X 0.8 X 0.95 mm</p>
>NAME
>VALUE
Chip, 3.20 X 1.60 X 1.60 mm body
<p>Chip package with body size 3.20 X 1.60 X 1.60 mm</p>
>NAME
>VALUE
CHIP, 1 X 0.5 X 0.55 mm body
<p>CHIP package with body size 1 X 0.5 X 0.55 mm</p>
CHIP, 2 X 1.25 X 0.95 mm body
<p>CHIP package with body size 2 X 1.25 X 0.95 mm</p>
CHIP, 1.6 X 0.8 X 0.95 mm body
<p>CHIP package with body size 1.6 X 0.8 X 0.95 mm</p>
Chip, 3.20 X 1.60 X 1.60 mm body
<p>Chip package with body size 3.20 X 1.60 X 1.60 mm</p>
Chip, 2.50 X 2.00 X 1.00 mm body
<p>Chip package with body size 2.50 X 2.00 X 1.00 mm</p>
>NAME
>VALUE
Chip, 2.50 X 2.00 X 1.00 mm body
<p>Chip package with body size 2.50 X 2.00 X 1.00 mm</p>
6-SOT23, 0.65 mm pitch, 2.30 mm span, 2.00 X 1.25 X 1.10 mm body
<p>6-pin SOT23 package with 0.65 mm pitch, 2.30 mm span with body size 2.00 X 1.25 X 1.10 mm</p>
>NAME
>VALUE
6-SOT23, 0.65 mm pitch, 2.30 mm span, 2.00 X 1.25 X 1.10 mm body
<p>6-pin SOT23 package with 0.65 mm pitch, 2.30 mm span with body size 2.00 X 1.25 X 1.10 mm</p>
<b>OSH Park Design Rules</b>
<p>
Please make sure your boards conform to these design rules.
</p>
<p>
Note, that not all DRC settings must be set by the manufacturer. Several can be adjusted for the design, including those listed on our docs page here.
<a href="http://docs.oshpark.com/design-tools/eagle/design-rules-files/">Adjustable Settings</a>
</p>
Since Version 6.2.2 text objects can contain more than one line,
which will not be processed correctly with this version.
Since Version 8.3, EAGLE supports Fusion synchronisation.
This feature will not be available in this version and saving
the document will break the link to the Fusion PCB feature.
Since Version 8.3, EAGLE supports URNs for individual library
assets (packages, symbols, and devices). The URNs of those assets
will not be understood (or retained) with this version.
Since Version 8.3, EAGLE supports the association of 3D packages
with devices in libraries, schematics, and board files. Those 3D
packages will not be understood (or retained) with this version.