(kicad_pcb (version 20171130) (host pcbnew "(5.0.0)")
  (general
    (thickness 1.6)
    (drawings 15)
    (tracks 83)
    (zones 0)
    (modules 15)
    (nets 30)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (user_trace_width 0.5)
    (user_trace_width 1)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 3.5 3.5)
    (pad_drill 3)
    (pad_to_mask_clearance 0.0508)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 VCC)
  (net 2 GND)
  (net 3 "Net-(D1-Pad1)")
  (net 4 "Net-(D1-Pad2)")
  (net 5 "Net-(J1-Pad2)")
  (net 6 "Net-(J1-Pad3)")
  (net 7 D+)
  (net 8 D-)
  (net 9 "Net-(J2-Pad3)")
  (net 10 "Net-(J2-Pad4)")
  (net 11 "Net-(J2-Pad6)")
  (net 12 TX)
  (net 13 "Net-(U1-Pad2)")
  (net 14 "Net-(U1-Pad3)")
  (net 15 "Net-(U1-Pad5)")
  (net 16 "Net-(U1-Pad6)")
  (net 17 "Net-(U1-Pad9)")
  (net 18 "Net-(U1-Pad10)")
  (net 19 "Net-(U1-Pad11)")
  (net 20 "Net-(U1-Pad12)")
  (net 21 "Net-(U1-Pad13)")
  (net 22 "Net-(U1-Pad14)")
  (net 23 "Net-(U1-Pad17)")
  (net 24 "Net-(U1-Pad19)")
  (net 25 "Net-(U1-Pad22)")
  (net 26 "Net-(U1-Pad27)")
  (net 27 "Net-(U1-Pad28)")
  (net 28 "Net-(U2-Pad1)")
  (net 29 "Net-(J2-Pad5)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net D+)
    (add_net D-)
    (add_net GND)
    (add_net "Net-(D1-Pad1)")
    (add_net "Net-(D1-Pad2)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J2-Pad3)")
    (add_net "Net-(J2-Pad4)")
    (add_net "Net-(J2-Pad5)")
    (add_net "Net-(J2-Pad6)")
    (add_net "Net-(U1-Pad10)")
    (add_net "Net-(U1-Pad11)")
    (add_net "Net-(U1-Pad12)")
    (add_net "Net-(U1-Pad13)")
    (add_net "Net-(U1-Pad14)")
    (add_net "Net-(U1-Pad17)")
    (add_net "Net-(U1-Pad19)")
    (add_net "Net-(U1-Pad2)")
    (add_net "Net-(U1-Pad22)")
    (add_net "Net-(U1-Pad27)")
    (add_net "Net-(U1-Pad28)")
    (add_net "Net-(U1-Pad3)")
    (add_net "Net-(U1-Pad5)")
    (add_net "Net-(U1-Pad6)")
    (add_net "Net-(U1-Pad9)")
    (add_net "Net-(U2-Pad1)")
    (add_net TX)
    (add_net VCC)
  )
  (module AOR_custom:AOR_LOGO (layer F.Cu) (tedit 5C26ADAA)
    (at 119.634 68.834)
    (fp_text reference G*** (at 0 0) (layer F.SilkS) hide)
    (fp_text value AOR_LOGO (at 0.75 0) (layer F.SilkS) hide)
  )
  (module MountingHole:MountingHole_3.2mm_M3 (layer F.Cu) (tedit 5C3800D2)
    (at 150.495 71.12)
    (descr "Mounting Hole 3.2mm, no annular, M3")
    (tags "mounting hole 3.2mm no annular m3")
    (attr virtual)
    (fp_text reference "" (at 0 -4.2) (layer F.SilkS))
    (fp_text value MountingHole_3.2mm_M3 (at 0 4.2) (layer F.Fab))
    (fp_text user %R (at 0.3 0) (layer F.Fab))
    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
  )
  (module MountingHole:MountingHole_3.2mm_M3 (layer F.Cu) (tedit 5C3800D2)
    (at 125.73 83.185)
    (descr "Mounting Hole 3.2mm, no annular, M3")
    (tags "mounting hole 3.2mm no annular m3")
    (attr virtual)
    (fp_text reference "" (at 0 -4.2) (layer F.SilkS))
    (fp_text value MountingHole_3.2mm_M3 (at 0 4.2) (layer F.Fab))
    (fp_text user %R (at 0.3 0) (layer F.Fab))
    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
  )
  (module MountingHole:MountingHole_3.2mm_M3 (layer F.Cu) (tedit 5C3800D2)
    (at 150.495 83.185)
    (descr "Mounting Hole 3.2mm, no annular, M3")
    (tags "mounting hole 3.2mm no annular m3")
    (attr virtual)
    (fp_text reference "" (at 0 -4.2) (layer F.SilkS))
    (fp_text value MountingHole_3.2mm_M3 (at 0 4.2) (layer F.Fab))
    (fp_text user %R (at 0.3 0) (layer F.Fab))
    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
  )
  (module Capacitor_THT:CP_Radial_D5.0mm_P2.00mm (layer F.Cu) (tedit 5AE50EF0)
    (at 142.24 71.12)
    (descr "CP, Radial series, Radial, pin pitch=2.00mm, , diameter=5mm, Electrolytic Capacitor")
    (tags "CP Radial series Radial pin pitch 2.00mm  diameter 5mm Electrolytic Capacitor")
    (fp_text reference C1 (at 4.064 -2.032) (layer F.SilkS))
    (fp_text value "10 uF" (at 1 3.75) (layer F.Fab))
    (fp_text user %R (at 1 0) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 2 thru_hole circle (at 2 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/CP_Radial_D5.0mm_P2.00mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0)
    (at 135.89 83.82)
    (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
    (tags "C Disc series Radial pin pitch 2.50mm  diameter 3.0mm width 1.6mm Capacitor")
    (fp_text reference C2 (at 1.25 -1.778) (layer F.SilkS))
    (fp_text value "0.1 uF" (at 1.25 2.05) (layer F.Fab))
    (fp_text user %R (at 1.25 0) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W1.6mm_P2.50mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module LED_THT:LED_D3.0mm (layer F.Cu) (tedit 587A3A7B)
    (at 127 77.216 180)
    (descr "LED, diameter 3.0mm, 2 pins")
    (tags "LED diameter 3.0mm 2 pins")
    (fp_text reference D1 (at 1.27 -2.96 180) (layer F.SilkS))
    (fp_text value LED (at 1.27 2.96 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 3 "Net-(D1-Pad1)"))
    (pad 2 thru_hole circle (at 2.54 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
      (net 4 "Net-(D1-Pad2)"))
    (model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D3.0mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_USB:USB_B_OST_USB-B1HSxx_Horizontal (layer F.Cu) (tedit 5AFE01FF)
    (at 119.38 78.74 180)
    (descr "USB B receptacle, Horizontal, through-hole, http://www.on-shore.com/wp-content/uploads/2015/09/usb-b1hsxx.pdf")
    (tags "USB-B receptacle horizontal through-hole")
    (fp_text reference J1 (at -2.286 -2.286 270) (layer F.SilkS))
    (fp_text value USB_B (at 6.76 10.27 180) (layer F.Fab))
    (fp_text user %R (at 6.76 1.25 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 0.92) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 2 thru_hole circle (at 0 2.5 180) (size 1.7 1.7) (drill 0.92) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad2)"))
    (pad 3 thru_hole circle (at 2 2.5 180) (size 1.7 1.7) (drill 0.92) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad3)"))
    (pad 4 thru_hole circle (at 2 0 180) (size 1.7 1.7) (drill 0.92) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 5 thru_hole circle (at 4.71 -4.77 180) (size 3.5 3.5) (drill 2.33) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 5 thru_hole circle (at 4.71 7.27 180) (size 3.5 3.5) (drill 2.33) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_B_OST_USB-B1HSxx_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_RJ:RJ45_Amphenol_54602-x08_Horizontal (layer F.Cu) (tedit 5B103613)
    (at 158.75 81.28 90)
    (descr "8 Pol Shallow Latch Connector, Modjack, RJ45 (https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/c-bmj-0102.pdf)")
    (tags RJ45)
    (fp_text reference J2 (at -4.064 -3.048 180) (layer F.SilkS))
    (fp_text value RJ45 (at 4.445 4 90) (layer F.Fab))
    (fp_text user %R (at 4.445 2 90) (layer F.Fab))
    (pad "" np_thru_hole circle (at 10.16 6.35 90) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
    (pad "" np_thru_hole circle (at -1.27 6.35 90) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 7 D+))
    (pad 2 thru_hole circle (at 1.27 -2.54 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 8 D-))
    (pad 3 thru_hole circle (at 2.54 0 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 9 "Net-(J2-Pad3)"))
    (pad 4 thru_hole circle (at 3.81 -2.54 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 10 "Net-(J2-Pad4)"))
    (pad 5 thru_hole circle (at 5.08 0 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 29 "Net-(J2-Pad5)"))
    (pad 6 thru_hole circle (at 6.35 -2.54 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad6)"))
    (pad 7 thru_hole circle (at 7.62 0 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 8 thru_hole circle (at 8.89 -2.54 90) (size 1.5 1.5) (drill 0.76) (layers *.Cu *.Mask)
      (net 2 GND))
    (model ${KISYS3DMOD}/Connector_RJ.3dshapes/RJ45_Amphenol_54602-x08_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_1206_3216Metric (layer F.Cu) (tedit 5B301BBD)
    (at 131.95 83.82 180)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R1 (at -0.13 1.778 180) (layer F.SilkS))
    (fp_text value 220 (at 0 1.82 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -1.4 0 180) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
      (net 1 VCC))
    (pad 2 smd roundrect (at 1.4 0 180) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
      (net 4 "Net-(D1-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_1206_3216Metric (layer F.Cu) (tedit 5B301BBD)
    (at 143.386 76.2)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R2 (at 3.426 0) (layer F.SilkS))
    (fp_text value 220 (at 0 1.82) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 2 smd roundrect (at 1.4 0) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
      (net 7 D+))
    (pad 1 smd roundrect (at -1.4 0) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
      (net 8 D-))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_SO:SSOP-28_5.3x10.2mm_P0.65mm (layer F.Cu) (tedit 5A02F25C)
    (at 134.62 74.93 180)
    (descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U1 (at 0 -6.25 180) (layer F.SilkS))
    (fp_text value FT232RL (at 0 6.25 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd rect (at -3.6 -4.225 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 TX))
    (pad 2 smd rect (at -3.6 -3.575 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 13 "Net-(U1-Pad2)"))
    (pad 3 smd rect (at -3.6 -2.925 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 14 "Net-(U1-Pad3)"))
    (pad 4 smd rect (at -3.6 -2.275 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (pad 5 smd rect (at -3.6 -1.625 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 15 "Net-(U1-Pad5)"))
    (pad 6 smd rect (at -3.6 -0.975 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 16 "Net-(U1-Pad6)"))
    (pad 7 smd rect (at -3.6 -0.325 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 8 smd rect (at -3.6 0.325 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 9 smd rect (at -3.6 0.975 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 17 "Net-(U1-Pad9)"))
    (pad 10 smd rect (at -3.6 1.625 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 18 "Net-(U1-Pad10)"))
    (pad 11 smd rect (at -3.6 2.275 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 19 "Net-(U1-Pad11)"))
    (pad 12 smd rect (at -3.6 2.925 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 20 "Net-(U1-Pad12)"))
    (pad 13 smd rect (at -3.6 3.575 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 21 "Net-(U1-Pad13)"))
    (pad 14 smd rect (at -3.6 4.225 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 22 "Net-(U1-Pad14)"))
    (pad 15 smd rect (at 3.6 4.225 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad3)"))
    (pad 16 smd rect (at 3.6 3.575 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(J1-Pad2)"))
    (pad 17 smd rect (at 3.6 2.925 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 23 "Net-(U1-Pad17)"))
    (pad 18 smd rect (at 3.6 2.275 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 19 smd rect (at 3.6 1.625 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 24 "Net-(U1-Pad19)"))
    (pad 20 smd rect (at 3.6 0.975 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (pad 21 smd rect (at 3.6 0.325 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 22 smd rect (at 3.6 -0.325 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 25 "Net-(U1-Pad22)"))
    (pad 23 smd rect (at 3.6 -0.975 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(D1-Pad1)"))
    (pad 24 smd rect (at 3.6 -1.625 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 25 smd rect (at 3.6 -2.275 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 26 smd rect (at 3.6 -2.925 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 27 smd rect (at 3.6 -3.575 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 26 "Net-(U1-Pad27)"))
    (pad 28 smd rect (at 3.6 -4.225 180) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 27 "Net-(U1-Pad28)"))
    (model ${KISYS3DMOD}/Package_SO.3dshapes/SSOP-28_5.3x10.2mm_P0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5A02F2D3)
    (at 143.51 81.28 90)
    (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U2 (at 0 -3.5 90) (layer F.SilkS))
    (fp_text value SP3485CN (at 0 3.5 90) (layer F.Fab))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 28 "Net-(U2-Pad1)"))
    (pad 2 smd rect (at -2.7 -0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (pad 3 smd rect (at -2.7 0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (pad 4 smd rect (at -2.7 1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 TX))
    (pad 5 smd rect (at 2.7 1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 6 smd rect (at 2.7 0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 D+))
    (pad 7 smd rect (at 2.7 -0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 D-))
    (pad 8 smd rect (at 2.7 -1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 VCC))
    (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module MountingHole:MountingHole_3.2mm_M3 (layer F.Cu) (tedit 5C3800D2)
    (at 125.73 71.12)
    (descr "Mounting Hole 3.2mm, no annular, M3")
    (tags "mounting hole 3.2mm no annular m3")
    (attr virtual)
    (fp_text reference "" (at 0 -4.2) (layer F.SilkS))
    (fp_text value MountingHole_3.2mm_M3 (at 0 4.2) (layer F.Fab))
    (fp_text user %R (at 0.3 0) (layer F.Fab))
    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
  )
  (module AOR_custom:AOR_LOGO (layer B.Cu) (tedit 5C26ADAA)
    (at 140.208 80.264 180)
    (fp_text reference G*** (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value AOR_LOGO (at 0.75 0 180) (layer B.SilkS) hide)
  )
  (gr_text GND (at 160.528 71.882) (layer B.SilkS))
  (gr_text GND (at 157.734 70.612) (layer B.SilkS))
  (gr_text D- (at 157.226 81.788) (layer B.SilkS))
  (gr_text D+ (at 159.766 83.058) (layer B.SilkS))
  (gr_text "USB IN" (at 119.888 84.582) (layer F.SilkS))
  (gr_text "DMX OUT" (at 158.75 68.326) (layer F.SilkS))
  (gr_text "1: D+\n2: D-\n7: GND\n8: GND" (at 149.352 77.216) (layer F.SilkS))
  (gr_text "1: D+\n2: D-\n7: GND\n8: GND" (at 165.862 76.708) (layer B.SilkS))
  (gr_text "REV C, 1-21-2019" (at 129.032 76.962 90) (layer F.SilkS))
  (gr_line (start 167.64 86.36) (end 111.76 86.36) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 111.76 67.31) (end 167.64 67.31) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 167.64 67.31) (end 167.64 86.36) (layer Edge.Cuts) (width 0.2))
  (gr_text TX (at 125.476 74.422) (layer F.SilkS))
  (gr_text "DMX-USB\nREV C, 1-21-2019" (at 139.954 76.2) (layer B.SilkS))
  (gr_line (start 111.76 67.31) (end 111.76 86.36) (layer Edge.Cuts) (width 0.2))
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 111.76 67.31) (xy 167.64 67.31) (xy 167.64 86.36) (xy 111.76 86.36)
      )
    )
  )
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 111.76 67.31) (xy 167.64 67.31) (xy 167.64 86.36) (xy 111.76 86.36)
      )
    )
  )
)
