(kicad_pcb (version 4) (host pcbnew 4.0.6)
  (general
    (links 0)
    (no_connects 23)
    (area 137.731499 104.711499 156.908501 118.808501)
    (thickness 1.6002)
    (drawings 15)
    (tracks 142)
    (zones 0)
    (modules 9)
    (nets 12)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (44 Edge.Cuts user)
  )
  (setup
    (last_trace_width 0.2)
    (user_trace_width 0.1524)
    (user_trace_width 0.2)
    (user_trace_width 0.25)
    (user_trace_width 0.3)
    (user_trace_width 0.4)
    (user_trace_width 0.5)
    (user_trace_width 0.6)
    (user_trace_width 0.8)
    (trace_clearance 0.254)
    (zone_clearance 0.1524)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.127)
    (edge_width 0.127)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.6858)
    (via_min_drill 0.3302)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed no)
    (uvia_min_size 0.508)
    (uvia_min_drill 0.127)
    (pcb_text_width 0.127)
    (pcb_text_size 0.6 0.6)
    (mod_edge_width 0.127)
    (mod_text_size 0.6 0.6)
    (mod_text_width 0.127)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.05)
    (pad_to_paste_clearance -0.04)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x3ffff_80000001)
      (usegerberextensions true)
      (usegerberattributes true)
      (excludeedgelayer true)
      (linewidth 0.127000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory CAM/))
  )
  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 "Net-(C1-Pad2)")
  (net 3 "Net-(J1-Pad1)")
  (net 4 "Net-(J1-Pad2)")
  (net 5 "Net-(J1-Pad3)")
  (net 6 "Net-(J1-Pad4)")
  (net 7 "Net-(J1-Pad5)")
  (net 8 "Net-(J2-Pad1)")
  (net 9 "Net-(J2-Pad2)")
  (net 10 "Net-(J2-Pad3)")
  (net 11 "Net-(U1-Pad9)")
  (net_class Default "Imperial - this is the standard class"
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C1-Pad2)")
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad4)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(J2-Pad1)")
    (add_net "Net-(J2-Pad2)")
    (add_net "Net-(J2-Pad3)")
    (add_net "Net-(U1-Pad9)")
  )
  (net_class 0.2mm ""
    (clearance 0.2)
    (trace_width 0.2)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
  )
  (net_class Minimal ""
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
  )
  (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5949EA00)
    (at 150.495 107.315 270)
    (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C1 (at 0 1.5 270) (layer B.SilkS) hide)
    (fp_text value 10uf (at 0 1.5 270) (layer F.SilkS))
    (fp_text user %R (at 0 -1.5 270) (layer F.Fab))
    (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5949CCE0)
    (at 144.145 107.315 90)
    (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C2 (at 0 -1.5 90) (layer B.SilkS) hide)
    (fp_text value 0.1uf (at 0 -1.5 90) (layer F.SilkS))
    (fp_text user %R (at 0 -1.5 90) (layer F.Fab))
    (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x05_Pitch2.54mm (layer F.Cu) (tedit 5949CFCE)
    (at 154.94 106.68)
    (descr "Through hole straight pin header, 1x05, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x05 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value IO (at 0 12.49) (layer F.Fab))
    (fp_text user %R (at 0 -2.33) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x05_Pitch2.54mm.wrl
      (at (xyz 0 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x05_Pitch2.54mm (layer F.Cu) (tedit 5949CFC5)
    (at 139.7 106.68)
    (descr "Through hole straight pin header, 1x05, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x05 2.54mm single row")
    (fp_text reference J2 (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value ADC (at 0 12.49) (layer F.Fab))
    (fp_text user %R (at 0 -2.33) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 "Net-(J2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 "Net-(J2-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 "Net-(J2-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x05_Pitch2.54mm.wrl
      (at (xyz 0 -0.2 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 5949E5C8)
    (at 147.32 107.315 90)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R1 (at -2.54 0 90) (layer B.SilkS) hide)
    (fp_text value 10k (at 0 -1.5 90) (layer F.SilkS))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 5949CBFD)
    (at 144.145 116.205 180)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R2 (at 0 -1.27 180) (layer F.SilkS) hide)
    (fp_text value 10k (at 0 1.5 180) (layer F.SilkS))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(J1-Pad2)"))
    (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistors_SMD:R_0805 (layer F.Cu) (tedit 5949E5E4)
    (at 149.86 116.205 180)
    (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
    (tags "resistor 0805")
    (attr smd)
    (fp_text reference R3 (at 0 -1.5 180) (layer B.SilkS) hide)
    (fp_text value 10k (at 0 1.5 180) (layer F.SilkS))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module nixiemisc:nixiemisc-LGA-16-3X3 (layer F.Cu) (tedit 5949E5FB)
    (at 147.44954 112.1664)
    (descr "16-PIN LAND GRID ARRAY (LGA) (3 X 3 MM)")
    (tags "16-PIN LAND GRID ARRAY (LGA) (3 X 3 MM)")
    (attr smd)
    (fp_text reference U1 (at 1.524 -2.20726) (layer B.SilkS) hide)
    (fp_text value LIS3DH (at -2.67716 0.12954 90) (layer F.SilkS))
    (pad 1 smd rect (at -1.39954 -0.99822 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at -1.39954 -0.49784) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at -1.39954 0) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask))
    (pad 4 smd rect (at -1.39954 0.49784) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(J1-Pad2)"))
    (pad 5 smd rect (at -1.39954 0.99822 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 6 smd rect (at -0.49784 1.39954 90) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(J1-Pad3)"))
    (pad 7 smd rect (at 0 1.39954 90) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(J1-Pad4)"))
    (pad 8 smd rect (at 0.49784 1.39954 90) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(J1-Pad1)"))
    (pad 9 smd rect (at 1.39954 0.99822 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 11 "Net-(U1-Pad9)"))
    (pad 10 smd rect (at 1.39954 0.49784 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 11 smd rect (at 1.39954 0 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(J1-Pad5)"))
    (pad 12 smd rect (at 1.39954 -0.49784 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 13 smd rect (at 1.39954 -0.99822 180) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(J2-Pad1)"))
    (pad 14 smd rect (at 0.49784 -1.39954 270) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 15 smd rect (at 0 -1.39954 270) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(J2-Pad2)"))
    (pad 16 smd rect (at -0.49784 -1.39954 270) (size 0.6985 0.2794) (layers F.Cu F.Paste F.Mask)
      (net 10 "Net-(J2-Pad3)"))
  )
  (module logos:mermaid_s (layer B.Cu) (tedit 0)
    (at 146.05 116.586 180)
    (fp_text reference G*** (at 0 0 180) (layer B.SilkS) hide)
    (fp_text value LOGO (at 0.75 0 180) (layer B.SilkS) hide)
  )
  (gr_text nixies.us (at 143.637 116.459) (layer B.Mask))
  (gr_line (start 137.795 104.775) (end 137.795 118.745) (layer Edge.Cuts) (width 0.127))
  (gr_line (start 156.845 104.775) (end 137.795 104.775) (layer Edge.Cuts) (width 0.127))
  (gr_line (start 156.845 118.745) (end 156.845 104.775) (layer Edge.Cuts) (width 0.127))
  (gr_line (start 137.795 118.745) (end 156.845 118.745) (layer Edge.Cuts) (width 0.127))
  (gr_text Vin (at 141.605 116.84 270) (layer F.SilkS))
  (gr_text GND (at 141.605 114.3 270) (layer F.SilkS))
  (gr_text A3 (at 141.605 106.68 270) (layer F.SilkS))
  (gr_text A2 (at 141.605 109.22 270) (layer F.SilkS))
  (gr_text A1 (at 141.605 111.76 270) (layer F.SilkS))
  (gr_text INT1 (at 153.035 116.84 90) (layer F.SilkS))
  (gr_text SD0 (at 153.035 114.3 90) (layer F.SilkS))
  (gr_text SDA (at 153.035 111.76 90) (layer F.SilkS))
  (gr_text SCL (at 153.035 109.22 90) (layer F.SilkS))
  (gr_text CS (at 153.035 106.68 90) (layer F.SilkS))
  (zone (net 0) (net_name "") (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.1524))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 147.32 118.364) (xy 147.32 114.935) (xy 141.224 114.935) (xy 141.224 118.364)
      )
    )
  )
)
