(kicad_pcb (version 20171130) (host pcbnew "(5.0.2-5)-5")
  (general
    (thickness 1.6)
    (drawings 7)
    (tracks 79)
    (zones 0)
    (modules 3)
    (nets 15)
  )
  (page A4)
  (title_block
    (title "PCBPool Template")
    (date "21 December 2014")
    (rev 0.1)
    (company s-light.eu)
  )
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user hide)
    (41 Cmts.User user hide)
    (42 Eco1.User user hide)
    (43 Eco2.User user hide)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.2)
    (user_trace_width 0.15)
    (user_trace_width 0.2)
    (user_trace_width 0.254)
    (user_trace_width 0.3)
    (user_trace_width 0.5)
    (user_trace_width 0.75)
    (user_trace_width 1)
    (user_trace_width 2)
    (trace_clearance 0.15)
    (zone_clearance 0.15)
    (zone_45_only yes)
    (trace_min 0.15)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.6)
    (via_drill 0.3)
    (via_min_size 0.6)
    (via_min_drill 0.3)
    (user_via 0.6 0.3)
    (user_via 0.7 0.4)
    (user_via 0.9 0.5)
    (user_via 1 0.6)
    (user_via 1.1 0.7)
    (user_via 1.2 0.8)
    (uvia_size 0.5)
    (uvia_drill 0.2)
    (uvias_allowed no)
    (uvia_min_size 0.5)
    (uvia_min_drill 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0.08)
    (solder_mask_min_width 0.1)
    (aux_axis_origin 50 50)
    (grid_origin 50 50)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory "export/svg/"))
  )
  (net 0 "")
  (net 1 "Net-(J1-Pad1)")
  (net 2 "Net-(J1-Pad2)")
  (net 3 "Net-(J1-Pad3)")
  (net 4 "Net-(J1-Pad4)")
  (net 5 "Net-(J1-Pad5)")
  (net 6 "Net-(J1-Pad6)")
  (net 7 "Net-(J1-Pad7)")
  (net 8 "Net-(J1-Pad8)")
  (net 9 "Net-(J1-Pad9)")
  (net 10 "Net-(J1-Pad10)")
  (net 11 "Net-(J1-Pad11)")
  (net 12 "Net-(J1-Pad12)")
  (net 13 "Net-(J1-Pad13)")
  (net 14 "Net-(J1-Pad14)")
  (net_class Default "This is the default net class."
    (clearance 0.15)
    (trace_width 0.2)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.5)
    (uvia_drill 0.2)
    (add_net "Net-(J1-Pad1)")
    (add_net "Net-(J1-Pad10)")
    (add_net "Net-(J1-Pad11)")
    (add_net "Net-(J1-Pad12)")
    (add_net "Net-(J1-Pad13)")
    (add_net "Net-(J1-Pad14)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J1-Pad3)")
    (add_net "Net-(J1-Pad4)")
    (add_net "Net-(J1-Pad5)")
    (add_net "Net-(J1-Pad6)")
    (add_net "Net-(J1-Pad7)")
    (add_net "Net-(J1-Pad8)")
    (add_net "Net-(J1-Pad9)")
  )
  (net_class LED "max 0.5A"
    (clearance 0.15)
    (trace_width 0.3)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.5)
    (uvia_drill 0.2)
  )
  (net_class Power "max 1.0A"
    (clearance 0.2)
    (trace_width 0.5)
    (via_dia 0.9)
    (via_drill 0.5)
    (uvia_dia 0.5)
    (uvia_drill 0.2)
  )
  (module Connector_PinSocket_2.54mm:PinSocket_1x14_P2.54mm_Horizontal (layer B.Cu) (tedit 5C74E5C6)
    (at 129.756 75.4)
    (descr "Through hole angled socket strip, 1x14, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole angled socket strip THT 1x14 2.54mm single row")
    (fp_text reference " " (at -4.38 2.77) (layer B.SilkS))
    (fp_text value " " (at -4.38 -35.79) (layer B.Fab) hide)
    (fp_text user %R (at -5.775 -16.51 -90) (layer B.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 0 -2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 -5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 -7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(J1-Pad4)"))
    (pad 5 thru_hole oval (at 0 -10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad5)"))
    (pad 6 thru_hole oval (at 0 -12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad6)"))
    (pad 7 thru_hole oval (at 0 -15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad7)"))
    (pad 8 thru_hole oval (at 0 -17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 "Net-(J1-Pad8)"))
    (pad 9 thru_hole oval (at 0 -20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 "Net-(J1-Pad9)"))
    (pad 10 thru_hole oval (at 0 -22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 "Net-(J1-Pad10)"))
    (pad 11 thru_hole oval (at 0 -25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 "Net-(J1-Pad11)"))
    (pad 12 thru_hole oval (at 0 -27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 "Net-(J1-Pad12)"))
    (pad 13 thru_hole oval (at 0 -30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 "Net-(J1-Pad13)"))
    (pad 14 thru_hole oval (at 0 -33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 "Net-(J1-Pad14)"))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x14_P2.54mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Horizontal (layer F.Cu) (tedit 5C74E5E1)
    (at 174.968 79.972 270)
    (descr "Through hole angled pin header, 1x14, 2.54mm pitch, 6mm pin length, single row")
    (tags "Through hole angled pin header THT 1x14 2.54mm single row")
    (fp_text reference " " (at 4.385 -2.27 270) (layer F.SilkS) hide)
    (fp_text value " " (at 4.385 35.29 270) (layer F.Fab) hide)
    (fp_text user %R (at 2.77 16.51) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(J1-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(J1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(J1-Pad4)"))
    (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(J1-Pad5)"))
    (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 "Net-(J1-Pad6)"))
    (pad 7 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 "Net-(J1-Pad7)"))
    (pad 8 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 "Net-(J1-Pad8)"))
    (pad 9 thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 "Net-(J1-Pad9)"))
    (pad 10 thru_hole oval (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 "Net-(J1-Pad10)"))
    (pad 11 thru_hole oval (at 0 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 "Net-(J1-Pad11)"))
    (pad 12 thru_hole oval (at 0 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 "Net-(J1-Pad12)"))
    (pad 13 thru_hole oval (at 0 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 "Net-(J1-Pad13)"))
    (pad 14 thru_hole oval (at 0 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 "Net-(J1-Pad14)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x14_P2.54mm_Horizontal.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Symbol:OSHW-Logo2_14.6x12mm_SilkScreen (layer B.Cu) (tedit 5C74ECCD)
    (at 152.108 66.256 180)
    (descr "Open Source Hardware Symbol")
    (tags "Logo Symbol OSHW")
    (attr virtual)
    (fp_text reference REF** (at 0 0 180) (layer F.SilkS) hide)
    (fp_text value OSHW-Logo2_14.6x12mm_SilkScreen (at 0.75 0 180) (layer B.Fab) hide)
  )
  (gr_text "Right Angle Adapter, Right\n" (at 153.378 74.384) (layer F.SilkS))
  (gr_line (start 140.17 40.348) (end 119.088 40.348) (layer Edge.Cuts) (width 0.0254))
  (gr_line (start 177 72.86) (end 140.17 40.348) (layer Edge.Cuts) (width 0.0254))
  (gr_line (start 177 84.036) (end 177 72.86) (layer Edge.Cuts) (width 0.0254))
  (gr_line (start 139.662 84.036) (end 177 84.036) (layer Edge.Cuts) (width 0.0254))
  (gr_line (start 119.088 77.178) (end 139.662 84.036) (layer Edge.Cuts) (width 0.0254))
  (gr_line (start 119.088 40.348) (end 119.088 77.178) (layer Edge.Cuts) (width 0.0254))
)
