(kicad_pcb (version 4) (host pcbnew 4.0.1-2.fc23-product)
  (general
    (links 56)
    (no_connects 0)
    (area 85.089499 87.629499 123.190501 106.680501)
    (thickness 2)
    (drawings 9)
    (tracks 793)
    (zones 0)
    (modules 9)
    (nets 21)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (1 In1.Cu power)
    (2 In2.Cu power)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user hide)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.3)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.3)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (blind_buried_vias_allowed yes)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.1524)
    (aux_axis_origin 0 0)
    (grid_origin 129.54 127)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 /CH_5-)
  (net 2 /OUT-)
  (net 3 GND)
  (net 4 /CH_4-)
  (net 5 /CH_4+)
  (net 6 /CH_3-)
  (net 7 /CH_3+)
  (net 8 /OUT+)
  (net 9 /CH_5+)
  (net 10 /~VS3)
  (net 11 /~VS4)
  (net 12 VCC)
  (net 13 /CH_2-)
  (net 14 /CH_2+)
  (net 15 /CH_1-)
  (net 16 /CH_1+)
  (net 17 /~VS1)
  (net 18 /~VS2)
  (net 19 VEE)
  (net 20 /~CH5_SEL)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net VCC)
    (add_net VEE)
  )
  (net_class Differentials ""
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /CH_1+)
    (add_net /CH_1-)
    (add_net /CH_2+)
    (add_net /CH_2-)
    (add_net /CH_3+)
    (add_net /CH_3-)
    (add_net /CH_4+)
    (add_net /CH_4-)
    (add_net /CH_5+)
    (add_net /CH_5-)
    (add_net /OUT+)
    (add_net /OUT-)
  )
  (net_class Logic ""
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6)
    (via_drill 0.3)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /~CH5_SEL)
    (add_net /~VS1)
    (add_net /~VS2)
    (add_net /~VS3)
    (add_net /~VS4)
  )
  (module Tektronix_hybrids:Tek-DIL-26 locked (layer B.Cu) (tedit 576EB536)
    (at 123.19 87.63 180)
    (fp_text reference P1 (at 36.83 -1.27 180) (layer F.SilkS))
    (fp_text value DIL_26 (at 5.08 -5.08 180) (layer B.Fab))
    (pad 13 connect rect (at 3.81 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 10 /~VS3))
    (pad 12 connect rect (at 6.35 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 9 /CH_5+))
    (pad 11 connect rect (at 8.89 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 8 /OUT+))
    (pad 10 connect rect (at 11.43 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 9 connect rect (at 13.97 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 7 /CH_3+))
    (pad 8 connect rect (at 16.51 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 6 /CH_3-))
    (pad 7 connect rect (at 19.05 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 6 connect rect (at 21.59 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 5 /CH_4+))
    (pad 5 connect rect (at 24.13 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 4 /CH_4-))
    (pad 4 connect rect (at 26.67 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 3 connect rect (at 29.21 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 2 /OUT-))
    (pad 2 connect rect (at 31.75 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 1 /CH_5-))
    (pad 1 connect rect (at 34.29 -1.27 180) (size 1.27 2) (layers F.Cu F.Mask))
    (pad 26 connect rect (at 34.29 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 19 VEE))
    (pad 25 connect rect (at 31.75 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 18 /~VS2))
    (pad 24 connect rect (at 29.21 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 17 /~VS1))
    (pad 23 connect rect (at 26.67 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 16 /CH_1+))
    (pad 22 connect rect (at 24.13 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 21 connect rect (at 21.59 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 15 /CH_1-))
    (pad 20 connect rect (at 19.05 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 19 connect rect (at 16.51 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 14 /CH_2+))
    (pad 18 connect rect (at 13.97 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 3 GND))
    (pad 17 connect rect (at 11.43 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 13 /CH_2-))
    (pad 16 connect rect (at 8.89 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask))
    (pad 15 connect rect (at 6.35 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 12 VCC))
    (pad 14 connect rect (at 3.81 -17.78 180) (size 1.27 2) (layers F.Cu F.Mask)
      (net 11 /~VS4))
  )
  (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm locked (layer F.Cu) (tedit 54130A77)
    (at 104.14 97.155 90)
    (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U2 (at 5.08 0.355 180) (layer F.SilkS))
    (fp_text value 4053 (at 0 3.55 90) (layer F.Fab))
    (pad 1 smd rect (at -2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 2 smd rect (at -2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 14 /CH_2+))
    (pad 3 smd rect (at -2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 4 smd rect (at -2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 /OUT-))
    (pad 5 smd rect (at -2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 13 /CH_2-))
    (pad 6 smd rect (at -2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 7 smd rect (at -2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 8 smd rect (at -2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 9 smd rect (at 2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 18 /~VS2))
    (pad 10 smd rect (at 2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 18 /~VS2))
    (pad 11 smd rect (at 2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 20 /~CH5_SEL))
    (pad 12 smd rect (at 2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 9 /CH_5+))
    (pad 13 smd rect (at 2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 14 smd rect (at 2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT+))
    (pad 15 smd rect (at 2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT+))
    (pad 16 smd rect (at 2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77)
    (at 111.125 97.155 270)
    (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U3 (at -5.08 0 360) (layer F.SilkS))
    (fp_text value 4053 (at 0 3.55 270) (layer F.Fab))
    (pad 1 smd rect (at -2.95 -2.275 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 5 /CH_4+))
    (pad 2 smd rect (at -2.95 -1.625 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 7 /CH_3+))
    (pad 3 smd rect (at -2.95 -0.975 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 4 /CH_4-))
    (pad 4 smd rect (at -2.95 -0.325 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 /OUT-))
    (pad 5 smd rect (at -2.95 0.325 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 6 /CH_3-))
    (pad 6 smd rect (at -2.95 0.975 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 11 /~VS4))
    (pad 7 smd rect (at -2.95 1.625 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 8 smd rect (at -2.95 2.275 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 9 smd rect (at 2.95 2.275 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 10 /~VS3))
    (pad 10 smd rect (at 2.95 1.625 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 10 /~VS3))
    (pad 11 smd rect (at 2.95 0.975 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 10 /~VS3))
    (pad 12 smd rect (at 2.95 0.325 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 13 smd rect (at 2.95 -0.325 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 14 smd rect (at 2.95 -0.975 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 15 smd rect (at 2.95 -1.625 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT+))
    (pad 16 smd rect (at 2.95 -2.275 270) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 118.11 102.235)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C1 (at 2.54 0) (layer F.SilkS))
    (fp_text value C (at 0 1.9) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 89.535 102.235 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C2 (at -3.175 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 118.745 94.615 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C3 (at 0 1.27 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631)
    (at 108.065 102.235 180)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (attr smd)
    (fp_text reference C4 (at 2.655 0 180) (layer F.SilkS))
    (fp_text value C (at 0 1.9 180) (layer F.Fab))
    (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77)
    (at 97.155 97.155 90)
    (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (attr smd)
    (fp_text reference U1 (at 5.08 0 180) (layer F.SilkS))
    (fp_text value 4053 (at 0 3.55 90) (layer F.Fab))
    (pad 1 smd rect (at -2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 2 smd rect (at -2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 16 /CH_1+))
    (pad 3 smd rect (at -2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 4 smd rect (at -2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 /OUT-))
    (pad 5 smd rect (at -2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 15 /CH_1-))
    (pad 6 smd rect (at -2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 7 smd rect (at -2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 19 VEE))
    (pad 8 smd rect (at -2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 9 smd rect (at 2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 17 /~VS1))
    (pad 10 smd rect (at 2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 17 /~VS1))
    (pad 11 smd rect (at 2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 20 /~CH5_SEL))
    (pad 12 smd rect (at 2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 1 /CH_5-))
    (pad 13 smd rect (at 2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask))
    (pad 14 smd rect (at 2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 2 /OUT-))
    (pad 15 smd rect (at 2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 /OUT+))
    (pad 16 smd rect (at 2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module TO_SOT_Packages_SMD:SOT-23-5 (layer F.Cu) (tedit 55360473)
    (at 118.745 97.155)
    (descr "5-pin SOT23 package")
    (tags SOT-23-5)
    (attr smd)
    (fp_text reference U5 (at -0.05 2.54) (layer F.SilkS))
    (fp_text value 74AHC1G00 (at -0.05 2.35) (layer F.Fab))
    (pad 1 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 10 /~VS3))
    (pad 2 smd rect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 11 /~VS4))
    (pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 20 /~CH5_SEL))
    (pad 5 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 12 VCC))
    (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text 4 (at 86.995 97.79 270) (layer B.Cu))
  (gr_text 3 (at 86.995 95.885 270) (layer In2.Cu))
  (gr_text 2 (at 86.995 93.98 270) (layer In1.Cu))
  (gr_text 1 (at 86.995 92.075 270) (layer F.Cu))
  (gr_text "Channel switch\nReplaces\nTektronix\n155-0236-00 (U400)" (at 104.14 96.52) (layer B.SilkS))
  (gr_line (start 123.19 106.68) (end 85.09 106.68) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 123.19 87.63) (end 123.19 106.68) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 85.09 87.63) (end 123.19 87.63) (layer Edge.Cuts) (width 0.001))
  (gr_line (start 85.09 106.68) (end 85.09 87.63) (layer Edge.Cuts) (width 0.001))
  (zone (net 3) (net_name GND) (layer In2.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.3))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 122.555 88.265) (xy 122.555 106.045) (xy 85.725 106.045) (xy 85.725 99.06) (xy 88.9 99.06)
        (xy 88.9 90.805) (xy 85.725 90.805) (xy 85.725 88.265)
      )
    )
  )
  (zone (net 12) (net_name VCC) (layer In1.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.3))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 85.725 88.265) (xy 85.725 90.805) (xy 88.9 90.805) (xy 88.9 99.06) (xy 85.725 99.06)
        (xy 85.725 106.045) (xy 122.555 106.045) (xy 122.555 88.265)
      )
    )
  )
)
