(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-2")
  (general
    (thickness 1.6)
    (drawings 5)
    (tracks 10)
    (zones 0)
    (modules 3)
    (nets 6)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user hide)
    (48 B.Fab user)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.6)
    (user_trace_width 0.5)
    (user_trace_width 0.6)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.7 1.7)
    (pad_drill 1)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(U1-Pad5)")
  (net 2 "Net-(U1-Pad4)")
  (net 3 "Net-(U1-Pad3)")
  (net 4 "Net-(U1-Pad2)")
  (net 5 "Net-(U1-Pad1)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net "Net-(U1-Pad1)")
    (add_net "Net-(U1-Pad2)")
    (add_net "Net-(U1-Pad3)")
    (add_net "Net-(U1-Pad4)")
    (add_net "Net-(U1-Pad5)")
  )
  (module Package_TO_SOT_SMD:SOT-23-5 (layer F.Cu) (tedit 5FCB177F)
    (at 149.5298 106.0196)
    (descr "5-pin SOT23 package")
    (tags SOT-23-5)
    (attr smd)
    (fp_text reference SOT23-5 (at -0.0254 -2.9) (layer F.SilkS))
    (fp_text value MCP73811T-420I-OT (at 0 2.9) (layer F.Fab))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 5 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(U1-Pad5)"))
    (pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(U1-Pad4)"))
    (pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(U1-Pad3)"))
    (pad 2 smd rect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(U1-Pad2)"))
    (pad 1 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(U1-Pad1)"))
    (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical (layer F.Cu) (tedit 5FCB175F)
    (at 145.7198 103.4946)
    (descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x03 2.54mm single row")
    (fp_text reference REF** (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value PinHeader_1x03_P2.54mm_Vertical (at 0 7.41) (layer F.Fab))
    (fp_text user %R (at 0 2.54 90) (layer F.Fab))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 "Net-(U1-Pad3)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 "Net-(U1-Pad2)"))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 "Net-(U1-Pad1)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical (layer F.Cu) (tedit 5FCB1726)
    (at 153.3398 103.4946)
    (descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x03 2.54mm single row")
    (fp_text reference REF** (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value PinHeader_1x03_P2.54mm_Vertical (at 0 7.41) (layer F.Fab))
    (fp_text user %R (at 0 2.54 90) (layer F.Fab))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 "Net-(U1-Pad4)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 "Net-(U1-Pad5)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text AnalogTek (at 149.5044 108.8644) (layer F.SilkS))
  (gr_line (start 154.686 102.1588) (end 154.686 109.8804) (layer Edge.Cuts) (width 0.12))
  (gr_line (start 144.399 102.1588) (end 144.399 109.9058) (layer Edge.Cuts) (width 0.12))
  (gr_line (start 144.399 109.9058) (end 154.686 109.9058) (layer Edge.Cuts) (width 0.12))
  (gr_line (start 144.399 102.1588) (end 154.686 102.1588) (layer Edge.Cuts) (width 0.12))
)
