(kicad_pcb (version 20171130) (host pcbnew "(5.0.2)-1")
  (general
    (thickness 1.6)
    (drawings 112)
    (tracks 729)
    (zones 0)
    (modules 32)
    (nets 72)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user hide)
    (40 Dwgs.User user hide)
    (41 Cmts.User user hide)
    (42 Eco1.User user)
    (43 Eco2.User user hide)
    (44 Edge.Cuts user)
    (45 Margin user hide)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user hide)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.1524)
    (user_trace_width 0.1524)
    (user_trace_width 0.2032)
    (user_trace_width 0.254)
    (user_trace_width 0.3048)
    (user_trace_width 0.508)
    (user_trace_width 0.762)
    (user_trace_width 1.016)
    (trace_clearance 0.1524)
    (zone_clearance 0)
    (zone_45_only no)
    (trace_min 0.1524)
    (segment_width 0.2)
    (edge_width 0.2)
    (via_size 0.6858)
    (via_drill 0.3302)
    (via_min_size 0.508)
    (via_min_drill 0.254)
    (uvia_size 0.6858)
    (uvia_drill 0.3302)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.175)
    (pcb_text_size 0.7 0.9)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 2.75 1.7)
    (pad_drill 0)
    (pad_to_mask_clearance 0.02)
    (solder_mask_min_width 0.1)
    (aux_axis_origin 0 0)
    (grid_origin 100 100)
    (visible_elements 7FFDFF7F)
    (pcbplotparams
      (layerselection 0x010cc_7ffffffe)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference false)
      (plotvalue false)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "C:/Users/j.rowe/OneDrive - Team Industrial Services/My Documents/Personal/Word Clock Project/LED Pi Board/led_pi_board"))
  )
  (net 0 "")
  (net 1 +5V)
  (net 2 "Net-(D2-Pad1)")
  (net 3 GND)
  (net 4 /3.3V)
  (net 5 /SDA)
  (net 6 /SCL)
  (net 7 /GPIO4)
  (net 8 /TXD)
  (net 9 /RXD)
  (net 10 /GPIO17)
  (net 11 /GPIO18)
  (net 12 /GPIO27)
  (net 13 /GPIO22)
  (net 14 /GPIO23)
  (net 15 /GPIO24)
  (net 16 /SPI_MOSI)
  (net 17 /SPI_MISO)
  (net 18 /GPIO25)
  (net 19 /SPI_SCLK)
  (net 20 /SPI_CE1)
  (net 21 /SPI_CE0)
  (net 22 /GPIO0)
  (net 23 /GPIO1)
  (net 24 /GPIO5)
  (net 25 /GPIO6)
  (net 26 /GPIO12)
  (net 27 /GPIO13)
  (net 28 /GPIO19)
  (net 29 /GPIO16)
  (net 30 /GPIO26)
  (net 31 /MOSI1)
  (net 32 /SCLK1)
  (net 33 /CO0)
  (net 34 /DO0)
  (net 35 /DO1)
  (net 36 /CO1)
  (net 37 /M1_R1)
  (net 38 /M1_G1)
  (net 39 /M1_B1)
  (net 40 /M1_R2)
  (net 41 /M1_G2)
  (net 42 /M1_B2)
  (net 43 /M1_E')
  (net 44 /M1_A)
  (net 45 /M1_B)
  (net 46 /M1_C)
  (net 47 /M1_D)
  (net 48 /CLK)
  (net 49 /LAT)
  (net 50 /OE)
  (net 51 /M1_E'')
  (net 52 /M1_E)
  (net 53 "Net-(R1-Pad1)")
  (net 54 "Net-(U2-Pad17)")
  (net 55 "Net-(U2-Pad18)")
  (net 56 +5VA)
  (net 57 "Net-(C1-Pad1)")
  (net 58 "Net-(C4-Pad2)")
  (net 59 /AIN3)
  (net 60 /AIN2)
  (net 61 /AIN1)
  (net 62 /AIN0)
  (net 63 "Net-(R3-Pad2)")
  (net 64 /RXD3.3)
  (net 65 /TXD3.3)
  (net 66 "Net-(U4-Pad14)")
  (net 67 "Net-(U4-Pad13)")
  (net 68 "Net-(U1-Pad3)")
  (net 69 "Net-(U1-Pad1)")
  (net 70 "Net-(U1-Pad4)")
  (net 71 "Net-(U1-Pad5)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.6858)
    (via_drill 0.3302)
    (uvia_dia 0.6858)
    (uvia_drill 0.3302)
    (add_net +5V)
    (add_net +5VA)
    (add_net /3.3V)
    (add_net /AIN0)
    (add_net /AIN1)
    (add_net /AIN2)
    (add_net /AIN3)
    (add_net /CLK)
    (add_net /CO0)
    (add_net /CO1)
    (add_net /DO0)
    (add_net /DO1)
    (add_net /GPIO0)
    (add_net /GPIO1)
    (add_net /GPIO12)
    (add_net /GPIO13)
    (add_net /GPIO16)
    (add_net /GPIO17)
    (add_net /GPIO18)
    (add_net /GPIO19)
    (add_net /GPIO22)
    (add_net /GPIO23)
    (add_net /GPIO24)
    (add_net /GPIO25)
    (add_net /GPIO26)
    (add_net /GPIO27)
    (add_net /GPIO4)
    (add_net /GPIO5)
    (add_net /GPIO6)
    (add_net /LAT)
    (add_net /M1_A)
    (add_net /M1_B)
    (add_net /M1_B1)
    (add_net /M1_B2)
    (add_net /M1_C)
    (add_net /M1_D)
    (add_net /M1_E)
    (add_net /M1_E')
    (add_net /M1_E'')
    (add_net /M1_G1)
    (add_net /M1_G2)
    (add_net /M1_R1)
    (add_net /M1_R2)
    (add_net /MOSI1)
    (add_net /OE)
    (add_net /RXD)
    (add_net /RXD3.3)
    (add_net /SCL)
    (add_net /SCLK1)
    (add_net /SDA)
    (add_net /SPI_CE0)
    (add_net /SPI_CE1)
    (add_net /SPI_MISO)
    (add_net /SPI_MOSI)
    (add_net /SPI_SCLK)
    (add_net /TXD)
    (add_net /TXD3.3)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C4-Pad2)")
    (add_net "Net-(D2-Pad1)")
    (add_net "Net-(R1-Pad1)")
    (add_net "Net-(R3-Pad2)")
    (add_net "Net-(U1-Pad1)")
    (add_net "Net-(U1-Pad3)")
    (add_net "Net-(U1-Pad4)")
    (add_net "Net-(U1-Pad5)")
    (add_net "Net-(U2-Pad17)")
    (add_net "Net-(U2-Pad18)")
    (add_net "Net-(U4-Pad13)")
    (add_net "Net-(U4-Pad14)")
  )
  (module "Footprints:2917 Cap" (layer F.Cu) (tedit 5C8573C6)
    (at 111.37 128.05)
    (fp_text reference C3 (at 0.05 3.7) (layer Cmts.User))
    (fp_text value CP (at 0.05 -3.35) (layer F.Fab))
    (pad 1 smd rect (at 3.05 0) (size 2.5 4) (layers F.Cu F.Paste F.Mask)
      (net 56 +5VA))
    (pad 2 smd rect (at -3.25 0) (size 2.5 4) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
  )
  (module Footprints:PinPads1x5_2.54mm (layer B.Cu) (tedit 5C856BC9)
    (at 163.55 113.7 180)
    (descr "Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 1x04 2.54mm single row")
    (fp_text reference REF** (at 0 2.77 180) (layer B.SilkS) hide)
    (fp_text value PinPads1x5_2.54mm (at 0 -10.39 180) (layer B.Fab))
    (fp_text user %R (at 0 -3.81 90) (layer B.Fab))
    (pad 4 smd rect (at 0 -7.62 180) (size 2.75 1.7) (layers B.Cu B.Paste B.Mask)
      (net 56 +5VA))
    (pad 3 smd rect (at 0 -5.08 180) (size 2.74 1.7) (layers B.Cu B.Paste B.Mask)
      (net 34 /DO0))
    (pad 2 smd rect (at 0 -2.54 180) (size 2.75 1.7) (layers B.Cu B.Paste B.Mask)
      (net 33 /CO0))
    (pad 1 smd rect (at 0 0 180) (size 2.75 1.7) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinPads1x5_2.54mm (layer F.Cu) (tedit 5C856BD0)
    (at 163.55 113.7)
    (descr "Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 1x04 2.54mm single row")
    (fp_text reference REF** (at 0 -2.77) (layer F.SilkS) hide)
    (fp_text value PinPads1x5_2.54mm (at 0 10.39) (layer F.Fab))
    (fp_text user %R (at 0 3.81 90) (layer F.Fab))
    (pad 4 smd rect (at 0 7.62) (size 2.75 1.7) (layers F.Cu F.Paste F.Mask)
      (net 56 +5VA))
    (pad 3 smd rect (at 0 5.08) (size 2.74 1.7) (layers F.Cu F.Paste F.Mask)
      (net 34 /DO0))
    (pad 2 smd rect (at 0 2.54) (size 2.75 1.7) (layers F.Cu F.Paste F.Mask)
      (net 33 /CO0))
    (pad 1 smd rect (at 0 0) (size 2.75 1.7) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:SO-8 (layer F.Cu) (tedit 5C82F259)
    (at 122.3 118.75 180)
    (descr "<b>small outline</b>")
    (attr smd)
    (fp_text reference U6 (at 0.50896 -2.73566 180) (layer Dwgs.User))
    (fp_text value DMC3021LSD (at 1.14552 4.00933 180) (layer Dwgs.User))
    (fp_text user 8 (at 0.76344 -0.50896 180) (layer Dwgs.User))
    (pad 5 smd rect (at 2.7432 2.54 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 57 "Net-(C1-Pad1)"))
    (pad 4 smd rect (at -2.7432 2.54 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 71 "Net-(U1-Pad5)"))
    (pad 6 smd rect (at 2.7432 1.27 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 57 "Net-(C1-Pad1)"))
    (pad 7 smd rect (at 2.7432 0 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 69 "Net-(U1-Pad1)"))
    (pad 3 smd rect (at -2.7432 1.27 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 69 "Net-(U1-Pad1)"))
    (pad 2 smd rect (at -2.7432 0 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 70 "Net-(U1-Pad4)"))
    (pad 8 smd rect (at 2.7432 -1.27 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 69 "Net-(U1-Pad1)"))
    (pad 1 smd rect (at -2.7432 -1.27 180) (size 1.524 0.6096) (layers F.Cu F.Paste F.Mask)
      (net 56 +5VA))
  )
  (module Footprints:PinSocket_2x08_P2.54mm_Vertical (layer B.Cu) (tedit 5C849440)
    (at 149.65 125 90)
    (descr "Through hole straight socket strip, 2x08, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 2x08 2.54mm double row")
    (fp_text reference J8 (at -1.27 2.77 90) (layer Dwgs.User))
    (fp_text value Conn_02x08_Odd_Even (at -1.27 -20.55 90) (layer B.Fab))
    (fp_text user %R (at -1.17 -8.89) (layer B.Fab))
    (pad 1 thru_hole circle (at 0.1 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 37 /M1_R1))
    (pad 2 thru_hole oval (at -2.44 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 38 /M1_G1))
    (pad 3 thru_hole oval (at 0.1 -2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 39 /M1_B1))
    (pad 4 thru_hole oval (at -2.44 -2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 5 thru_hole oval (at 0.1 -5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 40 /M1_R2))
    (pad 6 thru_hole oval (at -2.44 -5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 41 /M1_G2))
    (pad 7 thru_hole oval (at 0.1 -7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 42 /M1_B2))
    (pad 8 thru_hole oval (at -2.44 -7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 43 /M1_E'))
    (pad 9 thru_hole oval (at 0.1 -10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 44 /M1_A))
    (pad 10 thru_hole oval (at -2.44 -10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 45 /M1_B))
    (pad 11 thru_hole oval (at 0.1 -12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 46 /M1_C))
    (pad 12 thru_hole oval (at -2.44 -12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 47 /M1_D))
    (pad 13 thru_hole oval (at 0.1 -15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 48 /CLK))
    (pad 14 thru_hole oval (at -2.44 -15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 49 /LAT))
    (pad 15 thru_hole oval (at 0.1 -17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 50 /OE))
    (pad 16 thru_hole oval (at -2.44 -17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 51 /M1_E''))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x08_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:SOP50P490X110-10N (layer F.Cu) (tedit 5C816045)
    (at 153 118.6 90)
    (attr smd)
    (fp_text reference U5 (at -0.55782 -3.59342 90) (layer F.SilkS) hide)
    (fp_text value ADS1015IRUGR (at 0.488195 3.41792 90) (layer Cmts.User))
    (pad 10 smd rect (at 2.15 -1 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 6 /SCL))
    (pad 9 smd rect (at 2.15 -0.5 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 5 /SDA))
    (pad 8 smd rect (at 2.15 0 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 58 "Net-(C4-Pad2)"))
    (pad 7 smd rect (at 2.15 0.5 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 59 /AIN3))
    (pad 6 smd rect (at 2.15 1 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 60 /AIN2))
    (pad 5 smd rect (at -2.15 1 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 61 /AIN1))
    (pad 4 smd rect (at -2.15 0.5 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 62 /AIN0))
    (pad 3 smd rect (at -2.15 0 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 2 smd rect (at -2.15 -0.5 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 63 "Net-(R3-Pad2)"))
    (pad 1 smd rect (at -2.15 -1 90) (size 1.47 0.28) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
  )
  (module Footprints:PinSocket_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 5C7D9286)
    (at 155.6 113.7)
    (descr "Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 1x04 2.54mm single row")
    (fp_text reference J11 (at 0 -2.77) (layer Dwgs.User))
    (fp_text value Conn_01x04 (at 0 10.39) (layer F.Fab))
    (fp_text user %R (at 0 3.81 90) (layer F.Fab))
    (pad 4 thru_hole circle (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 62 /AIN0))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 61 /AIN1))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 60 /AIN2))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 59 /AIN3))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5C7D90B0)
    (at 152 112.15)
    (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference C4 (at 0 -1.43) (layer F.SilkS) hide)
    (fp_text value 0.1uF (at 0 1.43) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 /3.3V))
    (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 58 "Net-(C4-Pad2)"))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:SOP65P640X110-20N (layer F.Cu) (tedit 5C82F21E)
    (at 145.85 117.35 270)
    (attr smd)
    (fp_text reference U4 (at 1.76437 -16.7644 270) (layer Dwgs.User))
    (fp_text value 74AHCT245 (at 4.3974 16.5087 270) (layer Dwgs.User))
    (pad 1 smd rect (at -2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at -2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 19 /SPI_SCLK))
    (pad 3 smd rect (at -2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 16 /SPI_MOSI))
    (pad 4 smd rect (at -2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 32 /SCLK1))
    (pad 5 smd rect (at -2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 31 /MOSI1))
    (pad 6 smd rect (at -2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 7 smd rect (at -2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 8 smd rect (at -2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 8 /TXD))
    (pad 9 smd rect (at -2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 9 /RXD))
    (pad 10 smd rect (at -2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 11 smd rect (at 2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 64 /RXD3.3))
    (pad 12 smd rect (at 2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 65 /TXD3.3))
    (pad 13 smd rect (at 2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 67 "Net-(U4-Pad13)"))
    (pad 14 smd rect (at 2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 66 "Net-(U4-Pad14)"))
    (pad 15 smd rect (at 2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 35 /DO1))
    (pad 16 smd rect (at 2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 36 /CO1))
    (pad 17 smd rect (at 2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 34 /DO0))
    (pad 18 smd rect (at 2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 33 /CO0))
    (pad 19 smd rect (at 2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 20 smd rect (at 2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
  )
  (module Footprints:LOGO (layer B.Cu) (tedit 0)
    (at 158.5 102.6 180)
    (fp_text reference LOGO (at 0 -5 180) (layer B.SilkS) hide)
    (fp_text value "" (at 0 0 180) (layer B.SilkS))
  )
  (module Footprints:SOP65P640X110-20N (layer F.Cu) (tedit 5C82F21E)
    (at 137.25 117.35 270)
    (attr smd)
    (fp_text reference U3 (at 1.76437 -16.7644 270) (layer Dwgs.User))
    (fp_text value 74AHCT245 (at 4.3974 16.5087 270) (layer Dwgs.User))
    (pad 1 smd rect (at -2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at -2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 28 /GPIO19))
    (pad 3 smd rect (at -2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 18 /GPIO25))
    (pad 4 smd rect (at -2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 30 /GPIO26))
    (pad 5 smd rect (at -2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 29 /GPIO16))
    (pad 6 smd rect (at -2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 27 /GPIO13))
    (pad 7 smd rect (at -2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 26 /GPIO12))
    (pad 8 smd rect (at -2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 25 /GPIO6))
    (pad 9 smd rect (at -2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 24 /GPIO5))
    (pad 10 smd rect (at -2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 11 smd rect (at 2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 37 /M1_R1))
    (pad 12 smd rect (at 2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 39 /M1_B1))
    (pad 13 smd rect (at 2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 40 /M1_R2))
    (pad 14 smd rect (at 2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 38 /M1_G1))
    (pad 15 smd rect (at 2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 41 /M1_G2))
    (pad 16 smd rect (at 2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 45 /M1_B))
    (pad 17 smd rect (at 2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 47 /M1_D))
    (pad 18 smd rect (at 2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 49 /LAT))
    (pad 19 smd rect (at 2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 20 smd rect (at 2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
  )
  (module Footprints:SOP65P640X110-20N (layer F.Cu) (tedit 5C82F21E)
    (at 129.75 117.35 270)
    (attr smd)
    (fp_text reference U2 (at 1.76437 -16.7644 270) (layer Dwgs.User))
    (fp_text value 74AHCT245 (at 4.3974 16.5087 270) (layer Dwgs.User))
    (pad 1 smd rect (at -2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at -2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 3 smd rect (at -2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 4 smd rect (at -2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 15 /GPIO24))
    (pad 5 smd rect (at -2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 14 /GPIO23))
    (pad 6 smd rect (at -2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 13 /GPIO22))
    (pad 7 smd rect (at -2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 12 /GPIO27))
    (pad 8 smd rect (at -2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 10 /GPIO17))
    (pad 9 smd rect (at -2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 7 /GPIO4))
    (pad 10 smd rect (at -2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 11 smd rect (at 2.921 2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 50 /OE))
    (pad 12 smd rect (at 2.921 2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 48 /CLK))
    (pad 13 smd rect (at 2.921 1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 46 /M1_C))
    (pad 14 smd rect (at 2.921 0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 44 /M1_A))
    (pad 15 smd rect (at 2.921 0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 42 /M1_B2))
    (pad 16 smd rect (at 2.921 -0.3302 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 52 /M1_E))
    (pad 17 smd rect (at 2.921 -0.9652 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 54 "Net-(U2-Pad17)"))
    (pad 18 smd rect (at 2.921 -1.6256 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 55 "Net-(U2-Pad18)"))
    (pad 19 smd rect (at 2.921 -2.286 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 20 smd rect (at 2.921 -2.921 270) (size 1.4732 0.3556) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
  )
  (module Footprints:PinHeader_2x20_P2.54mm_Vertical_SMD (layer F.Cu) (tedit 5C8303C5)
    (at 132.43 103.56 90)
    (descr "surface-mounted straight pin header, 2x20, 2.54mm pitch, double rows")
    (tags "Surface mounted pin header SMD 2x20 2.54mm double row")
    (solder_paste_margin -2.54)
    (attr smd)
    (fp_text reference J10 (at 0 -26.46 90) (layer Dwgs.User))
    (fp_text value Conn_02x20_Odd_Even (at 0 26.46 90) (layer F.Fab))
    (pad 40 smd rect (at 2.1 24.18 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 32 /SCLK1))
    (pad 39 smd rect (at -2.1 24.18 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 38 smd rect (at 2.1 21.64 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 31 /MOSI1))
    (pad 37 smd rect (at -2.1 21.64 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 30 /GPIO26))
    (pad 36 smd rect (at 2.1 19.1 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 29 /GPIO16))
    (pad 35 smd rect (at -2.1 19.1 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 28 /GPIO19))
    (pad 34 smd rect (at 2.1 16.56 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 33 smd rect (at -2.1 16.56 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 27 /GPIO13))
    (pad 32 smd rect (at 2.1 14.02 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 26 /GPIO12))
    (pad 31 smd rect (at -2.1 14.02 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 25 /GPIO6))
    (pad 30 smd rect (at 2.1 11.48 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 29 smd rect (at -2.1 11.48 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 24 /GPIO5))
    (pad 28 smd rect (at 2.1 8.94 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 23 /GPIO1))
    (pad 27 smd rect (at -2.1 8.94 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 22 /GPIO0))
    (pad 26 smd rect (at 2.1 6.4 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 21 /SPI_CE0))
    (pad 25 smd rect (at -2.1 6.4 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 24 smd rect (at 2.1 3.86 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 20 /SPI_CE1))
    (pad 23 smd rect (at -2.1 3.86 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 19 /SPI_SCLK))
    (pad 22 smd rect (at 2.1 1.32 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 18 /GPIO25))
    (pad 21 smd rect (at -2.1 1.32 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 17 /SPI_MISO))
    (pad 20 smd rect (at 2.1 -1.22 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 19 smd rect (at -2.1 -1.22 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 16 /SPI_MOSI))
    (pad 18 smd rect (at 2.1 -3.76 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 15 /GPIO24))
    (pad 17 smd rect (at -2.1 -3.76 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 4 /3.3V))
    (pad 16 smd rect (at 2.1 -6.3 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 14 /GPIO23))
    (pad 15 smd rect (at -2.1 -6.3 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 13 /GPIO22))
    (pad 14 smd rect (at 2.1 -8.84 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 13 smd rect (at -2.1 -8.84 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 12 /GPIO27))
    (pad 12 smd rect (at 2.1 -11.38 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 11 /GPIO18))
    (pad 11 smd rect (at -2.1 -11.38 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 10 /GPIO17))
    (pad 10 smd rect (at 2.1 -13.92 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 9 /RXD))
    (pad 9 smd rect (at -2.1 -13.92 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 8 smd rect (at 2.1 -16.46 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 8 /TXD))
    (pad 7 smd rect (at -2.1 -16.46 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 7 /GPIO4))
    (pad 6 smd rect (at 2.1 -19 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 3 GND))
    (pad 5 smd rect (at -2.1 -19 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 6 /SCL))
    (pad 4 smd rect (at 2.1 -21.54 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (pad 3 smd rect (at -2.1 -21.54 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 5 /SDA))
    (pad 2 smd rect (at 2.1 -24.08 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (pad 1 smd rect (at -2.1 -24.08 90) (size 2.5 1.4) (layers B.Cu B.Paste B.Mask)
      (net 4 /3.3V))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x20_P2.54mm_Vertical_SMD.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:D_SOD-123 (layer F.Cu) (tedit 5C82F2D9)
    (at 116.6 117 270)
    (descr SOD-123)
    (tags SOD-123)
    (attr smd)
    (fp_text reference D1 (at 0 -2 270) (layer Dwgs.User))
    (fp_text value MBR0120 (at 0 2.1 270) (layer F.Fab))
    (fp_text user %R (at 0 -2 270) (layer F.Fab))
    (pad 1 smd rect (at -1.65 0 270) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at 1.65 0 270) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask)
      (net 56 +5VA))
    (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-123.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_TO_SOT_SMD:TSOT-23-6 (layer F.Cu) (tedit 5C815433)
    (at 122.15 113.45)
    (descr "6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf")
    (tags "TSOT-23-6 MK06A TSOT-6")
    (attr smd)
    (fp_text reference U1 (at 0 -2.45) (layer F.SilkS) hide)
    (fp_text value MAX4866LEUT-T (at 0 2.5) (layer F.Fab))
    (fp_text user %R (at 0 0 90) (layer F.Fab))
    (pad 1 smd rect (at -1.31 -0.95) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 69 "Net-(U1-Pad1)"))
    (pad 2 smd rect (at -1.31 0) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 3 GND))
    (pad 3 smd rect (at -1.31 0.95) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 68 "Net-(U1-Pad3)"))
    (pad 4 smd rect (at 1.31 0.95) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 70 "Net-(U1-Pad4)"))
    (pad 5 smd rect (at 1.31 0) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 71 "Net-(U1-Pad5)"))
    (pad 6 smd rect (at 1.31 -0.95) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
      (net 53 "Net-(R1-Pad1)"))
    (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TSOT-23-6.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinHeader_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 5C7471F2)
    (at 158.1 113.7)
    (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x04 2.54mm single row")
    (fp_text reference J5 (at 0 -2.33) (layer Dwgs.User))
    (fp_text value Conn_01x04 (at 0 9.95) (layer F.Fab))
    (fp_text user %R (at 0 3.81 90) (layer F.Fab))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 64 /RXD3.3))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 65 /TXD3.3))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:SolderJumper-3_P1.3mm_Open_RoundedPad1.0x1.5mm (layer B.Cu) (tedit 5C747846)
    (at 130.2 122.475)
    (descr "SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, open")
    (tags "solder jumper open")
    (attr virtual)
    (fp_text reference JP1 (at 0 1.8) (layer B.CrtYd))
    (fp_text value "SJ Open 3" (at 0 -1.9) (layer B.Fab))
    (pad 2 smd rect (at 0 0) (size 1 1.5) (layers B.Cu B.Mask)
      (net 52 /M1_E))
    (pad 3 smd custom (at 1.3 0) (size 1 0.5) (layers B.Cu B.Mask)
      (net 43 /M1_E') (zone_connect 0)
      (options (clearance outline) (anchor rect))
      (primitives
        (gr_circle (center 0 -0.25) (end 0.5 -0.25) (width 0))
        (gr_circle (center 0 0.25) (end 0.5 0.25) (width 0))
        (gr_poly (pts
           (xy -0.55 0.75) (xy 0 0.75) (xy 0 -0.75) (xy -0.55 -0.75)) (width 0))
      ))
    (pad 1 smd custom (at -1.3 0) (size 1 0.5) (layers B.Cu B.Mask)
      (net 51 /M1_E'') (zone_connect 0)
      (options (clearance outline) (anchor rect))
      (primitives
        (gr_circle (center 0 -0.25) (end 0.5 -0.25) (width 0))
        (gr_circle (center 0 0.25) (end 0.5 0.25) (width 0))
        (gr_poly (pts
           (xy 0.55 0.75) (xy 0 0.75) (xy 0 -0.75) (xy 0.55 -0.75)) (width 0))
      ))
  )
  (module Footprints:TerminalBlock_bornier-2_P5.08mm locked (layer F.Cu) (tedit 5C7475A1)
    (at 119 126.5)
    (descr "simple 2-pin terminal block, pitch 5.08mm, revamped version of bornier2")
    (tags "terminal block bornier2")
    (fp_text reference J3 (at 2.54 -5.08) (layer Dwgs.User))
    (fp_text value Screw_Terminal_01x02 (at 2.54 5.08) (layer F.Fab))
    (fp_text user %R (at 2.54 0) (layer F.Fab))
    (pad 2 thru_hole circle (at 5.08 0) (size 3 3) (drill 1.52) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 1 thru_hole rect (at 0 0) (size 3 3) (drill 1.52) (layers *.Cu *.Mask)
      (net 56 +5VA))
    (model ${KISYS3DMOD}/TerminalBlock.3dshapes/TerminalBlock_bornier-2_P5.08mm.wrl
      (offset (xyz 2.539999961853027 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:LED_0603_1608Metric (layer F.Cu) (tedit 5C747731)
    (at 119.5 121.5 180)
    (descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags diode)
    (attr smd)
    (fp_text reference D2 (at 0 -1.43 180) (layer Dwgs.User))
    (fp_text value "green LED" (at 0 1.43 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 +5V))
    (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(D2-Pad1)"))
    (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinHeader_1x03_P2.54mm_Vertical (layer F.Cu) (tedit 5C7A0913)
    (at 102 111 90)
    (descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x03 2.54mm single row")
    (fp_text reference J9 (at 0 -2.33 90) (layer Dwgs.User))
    (fp_text value Conn_01x03 (at 0 7.41 90) (layer F.Fab))
    (fp_text user %R (at 0 2.54 180) (layer F.Fab))
    (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /3.3V))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinSocket_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 5C856B8E)
    (at 163.1 113.716)
    (descr "Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 1x04 2.54mm single row")
    (fp_text reference J6 (at 0 -2.77) (layer Dwgs.User))
    (fp_text value Conn_01x04 (at 0 10.39) (layer F.Fab))
    (fp_text user %R (at 0 3.81 90) (layer F.Fab))
    (pad 4 thru_hole rect (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 56 +5VA))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 34 /DO0))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 33 /CO0))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinSocket_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 5C7471C0)
    (at 160.6 113.716)
    (descr "Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
    (tags "Through hole socket strip THT 1x04 2.54mm single row")
    (fp_text reference J7 (at 0 -2.77) (layer Dwgs.User))
    (fp_text value Conn_01x04 (at 0 10.39) (layer F.Fab))
    (fp_text user %R (at 0 3.81 90) (layer F.Fab))
    (pad 4 thru_hole rect (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 56 +5VA))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 35 /DO1))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 36 /CO1))
    (pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinHeader_1x25_P2.54mm_Vertical (layer F.Cu) (tedit 5C7A08F8)
    (at 102 108.5 90)
    (descr "Through hole straight pin header, 1x25, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x25 2.54mm single row")
    (fp_text reference J4 (at 0 -2.33 90) (layer Dwgs.User))
    (fp_text value Conn_01x25 (at 0 63.29 90) (layer F.Fab))
    (fp_text user %R (at 0 30.48 180) (layer F.Fab))
    (pad 25 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 32 /SCLK1))
    (pad 24 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 31 /MOSI1))
    (pad 23 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 28 /GPIO19))
    (pad 22 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 29 /GPIO16))
    (pad 21 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 27 /GPIO13))
    (pad 20 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 26 /GPIO12))
    (pad 19 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 25 /GPIO6))
    (pad 18 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 24 /GPIO5))
    (pad 17 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 20 /SPI_CE1))
    (pad 16 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 21 /SPI_CE0))
    (pad 15 thru_hole oval (at 0 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 19 /SPI_SCLK))
    (pad 14 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 /SPI_MISO))
    (pad 13 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 /SPI_MOSI))
    (pad 12 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 /GPIO25))
    (pad 11 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 /GPIO24))
    (pad 10 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 /GPIO23))
    (pad 9 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 /GPIO22))
    (pad 8 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 /GPIO27))
    (pad 7 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 /GPIO18))
    (pad 6 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 /GPIO17))
    (pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 /GPIO4))
    (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 /RXD))
    (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 /TXD))
    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 /SCL))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 /SDA))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x25_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:PinHeader_2x20_P2.54mm_Vertical (layer F.Cu) (tedit 5C7A097F)
    (at 108.35 104.78 90)
    (descr "Through hole straight pin header, 2x20, 2.54mm pitch, double rows")
    (tags "Through hole pin header THT 2x20 2.54mm double row")
    (fp_text reference J2 (at 1.27 -2.33 90) (layer Dwgs.User))
    (fp_text value Raspberry_Pi_2_3 (at 1.27 50.59 90) (layer F.Fab))
    (fp_text user %R (at 1.27 24.13 180) (layer F.Fab))
    (pad 40 thru_hole oval (at 2.54 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 32 /SCLK1))
    (pad 39 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 38 thru_hole oval (at 2.54 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 31 /MOSI1))
    (pad 37 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 30 /GPIO26))
    (pad 36 thru_hole oval (at 2.54 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 29 /GPIO16))
    (pad 35 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 28 /GPIO19))
    (pad 34 thru_hole oval (at 2.54 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 33 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 27 /GPIO13))
    (pad 32 thru_hole oval (at 2.54 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 26 /GPIO12))
    (pad 31 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 25 /GPIO6))
    (pad 30 thru_hole oval (at 2.54 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 29 thru_hole oval (at 0 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 24 /GPIO5))
    (pad 28 thru_hole oval (at 2.54 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 23 /GPIO1))
    (pad 27 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 22 /GPIO0))
    (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 21 /SPI_CE0))
    (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 20 /SPI_CE1))
    (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 19 /SPI_SCLK))
    (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 /GPIO25))
    (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 /SPI_MISO))
    (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 /SPI_MOSI))
    (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 /GPIO24))
    (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /3.3V))
    (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 /GPIO23))
    (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 /GPIO22))
    (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 /GPIO27))
    (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 /GPIO18))
    (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 /GPIO17))
    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 /RXD))
    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 /TXD))
    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 /GPIO4))
    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 /SCL))
    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 /SDA))
    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 /3.3V))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x20_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Footprints:CUI_PJ-002A (layer F.Cu) (tedit 5C747576)
    (at 113.75 117 180)
    (fp_text reference J1 (at 1.85153 -6.77062 180) (layer Dwgs.User))
    (fp_text value PJ-002A (at 2.48793 5.78184 180) (layer Dwgs.User))
    (fp_line (start 4.5 -4.2) (end 1.5 -4.2) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 4.5 -5.2) (end 4.5 -4.2) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 1.5 -5.2) (end 4.5 -5.2) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 1.5 -4.2) (end 1.5 -5.2) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 6.5 -1.5) (end 6.5 1.5) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 5.5 -1.5) (end 6.5 -1.5) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 5.5 1.5) (end 5.5 -1.5) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 6.5 1.5) (end 5.5 1.5) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 0.5 -1.75) (end 0.5 1.75) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start -0.5 -1.75) (end 0.5 -1.75) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start -0.5 1.75) (end -0.5 -1.75) (layer Edge.Cuts) (width 0.0001))
    (fp_line (start 0.5 1.75) (end -0.5 1.75) (layer Edge.Cuts) (width 0.0001))
    (pad 3 thru_hole oval (at 3 -4.7) (size 4.5 2.25) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 2 thru_hole oval (at 6 0 270) (size 4.5 2.25) (drill 1) (layers *.Cu *.Mask)
      (net 3 GND))
    (pad 1 thru_hole oval (at 0 0 270) (size 5 2.5) (drill 1) (layers *.Cu *.Mask)
      (net 57 "Net-(C1-Pad1)"))
  )
  (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5C7B182C)
    (at 116.0125 112.85)
    (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference C2 (at 0 -1.43) (layer F.SilkS) hide)
    (fp_text value 0.1uF (at 0 1.43) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 GND))
    (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 57 "Net-(C1-Pad1)"))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5C7B1826)
    (at 110.9375 111.5 180)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
    (tags capacitor)
    (attr smd)
    (fp_text reference C1 (at 0 -1.65 180) (layer F.SilkS) hide)
    (fp_text value 10uF (at 0 1.65 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 57 "Net-(C1-Pad1)"))
    (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 GND))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5C7B1834)
    (at 125.2 113.4 270)
    (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R1 (at 0 -1.43 270) (layer F.SilkS) hide)
    (fp_text value 1K (at 0 1.43 270) (layer F.Fab))
    (fp_text user %R (at 0 0 270) (layer F.Fab))
    (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 GND))
    (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 53 "Net-(R1-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5C7B1839)
    (at 123.5 121.5 180)
    (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R2 (at 0 -1.43 180) (layer F.SilkS) hide)
    (fp_text value 1K (at 0 1.43 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 GND))
    (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(D2-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5C7D90BC)
    (at 148.55 112.45 180)
    (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R3 (at 0 -1.43 180) (layer F.SilkS) hide)
    (fp_text value 10K (at 0 1.43 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 /3.3V))
    (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 63 "Net-(R3-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5C7D90B4)
    (at 152 114.75 180)
    (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R4 (at 0 -1.43 180) (layer F.SilkS) hide)
    (fp_text value 10K (at 0 1.43 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 6 /SCL))
    (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 /3.3V))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5C7D90B8)
    (at 152 113.45 180)
    (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R5 (at 0 -1.43 180) (layer F.SilkS) hide)
    (fp_text value 10K (at 0 1.43 180) (layer F.Fab))
    (fp_text user %R (at 0 0 180) (layer F.Fab))
    (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 4 /3.3V))
    (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 5 /SDA))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text "5V Out" (at 117.1 129) (layer B.SilkS))
  (gr_text R1 (at 151.3 123.6) (layer B.SilkS))
  (gr_text A0 (at 156.75 120.15) (layer B.SilkS))
  (gr_text A1 (at 156.8 117.55) (layer B.SilkS))
  (gr_text A2 (at 156.8 115) (layer B.SilkS))
  (gr_text A3 (at 156.7 112.4) (layer B.SilkS))
  (gr_text "5V Signals" (at 156.5 123.8) (layer F.SilkS))
  (gr_text E (at 130.455 120.655) (layer B.SilkS))
  (gr_text D (at 138.54 126.295) (layer B.SilkS))
  (gr_text C (at 138.64 123.62) (layer B.SilkS))
  (gr_text B (at 141.065 126.245) (layer B.SilkS))
  (gr_text A (at 141.115 123.62) (layer B.SilkS))
  (gr_text 26 (at 158.75 102.425 90) (layer F.SilkS))
  (gr_text B (at 158.825 103 90) (layer F.SilkS))
  (gr_text D (at 160.45 110.05 90) (layer F.SilkS))
  (gr_text B1 (at 147.775 111.05 90) (layer F.SilkS))
  (gr_text R1 (at 145.225 111.075 90) (layer F.SilkS))
  (gr_text B2 (at 124.925 111.175 90) (layer F.SilkS))
  (gr_text A (at 127.45 110.225 90) (layer F.SilkS))
  (gr_text E (at 122.4 110.15 90) (layer F.SilkS))
  (gr_text C (at 119.85 110.125 90) (layer F.SilkS))
  (gr_text CLK (at 114.8 111.55 90) (layer F.SilkS))
  (gr_text OE (at 112.2 110.975 90) (layer F.SilkS))
  (gr_text RX (at 157.4 120.05) (layer F.SilkS))
  (gr_text TX (at 157.425 117.525) (layer F.SilkS))
  (gr_text G1 (at 151.64 126.395) (layer B.SilkS))
  (gr_text GND (at 149.31 126.33) (layer B.SilkS))
  (gr_text G2 (at 146.415 126.42) (layer B.SilkS))
  (gr_text 8 (at 143.865 126.42) (layer B.SilkS))
  (gr_text LAT (at 136.29 126.32) (layer B.SilkS))
  (gr_text 16 (at 133.74 126.37) (layer B.SilkS))
  (gr_text B1 (at 148.865 123.585) (layer B.SilkS))
  (gr_text R2 (at 146.34 123.585) (layer B.SilkS))
  (gr_text 32 (at 143.815 123.585) (layer B.SilkS))
  (gr_text CLK (at 136.5 123.64) (layer B.SilkS))
  (gr_text OE (at 133.68 123.7) (layer B.SilkS))
  (gr_text GND (at 107.075 112.6) (layer B.SilkS))
  (gr_text 3.3V (at 104.525 112.625) (layer B.SilkS))
  (gr_text 5V (at 101.925 112.625) (layer F.SilkS))
  (gr_text 8 (at 127.98 122.56) (layer B.SilkS))
  (gr_text 16 (at 132.72 122.45) (layer B.SilkS))
  (gr_text R2 (at 150.25 109.55 90) (layer F.SilkS))
  (gr_text G1 (at 152.8 109.55 90) (layer F.SilkS))
  (gr_text G2 (at 155.4 109.55 90) (layer F.SilkS))
  (gr_text LAT (at 157.925 109.6 90) (layer F.SilkS))
  (gr_text 21 (at 162.95 107.575 90) (layer F.SilkS))
  (gr_text 20 (at 160.425 107.575 90) (layer F.SilkS))
  (gr_text 19 (at 157.925 107.575 90) (layer F.SilkS))
  (gr_text 16 (at 155.325 107.525 90) (layer F.SilkS))
  (gr_text 13 (at 152.8 107.575 90) (layer F.SilkS))
  (gr_text 12 (at 150.25 107.575 90) (layer F.SilkS))
  (gr_text 6 (at 147.675 107.575 90) (layer F.SilkS))
  (gr_text 5 (at 145.15 107.575 90) (layer F.SilkS))
  (gr_text CE1 (at 142.625 107.575 90) (layer F.SilkS))
  (gr_text CE0 (at 140.075 107.575 90) (layer F.SilkS))
  (gr_text CLK (at 137.525 107.575 90) (layer F.SilkS))
  (gr_text MI (at 134.975 107.575 90) (layer F.SilkS))
  (gr_text MO (at 132.45 107.575 90) (layer F.SilkS))
  (gr_text 25 (at 129.9 107.575 90) (layer F.SilkS))
  (gr_text 24 (at 127.375 107.575 90) (layer F.SilkS))
  (gr_text 23 (at 124.85 107.575 90) (layer F.SilkS))
  (gr_text 22 (at 122.25 107.575 90) (layer F.SilkS))
  (gr_text 27 (at 119.725 107.575 90) (layer F.SilkS))
  (gr_text 18 (at 117.275 107.575 90) (layer F.SilkS))
  (gr_text 17 (at 114.675 107.575 90) (layer F.SilkS))
  (gr_text 4 (at 112.15 107.575 90) (layer F.SilkS))
  (gr_text 3.3V (at 104.525 112.625) (layer F.SilkS))
  (gr_text RX (at 109.675 107.575 90) (layer F.SilkS))
  (gr_text TX (at 107.125 107.575 90) (layer F.SilkS))
  (gr_text SCL (at 104.55 107.575 90) (layer F.SilkS))
  (gr_text SDL (at 102.025 107.575 90) (layer F.SilkS))
  (gr_text HUB75 (at 156.4 128.525 90) (layer F.SilkS))
  (gr_text GND (at 161.675 112.325) (layer F.SilkS))
  (gr_text GND (at 159.125 112.35) (layer F.SilkS))
  (gr_text C0 (at 159.35 115) (layer F.SilkS))
  (gr_text D0 (at 159.35 117.55) (layer F.SilkS))
  (gr_text D1 (at 161.7 117.55) (layer F.SilkS))
  (gr_text C1 (at 161.6 115) (layer F.SilkS))
  (gr_text 5V (at 159.3 120.125) (layer F.SilkS))
  (gr_text 5V (at 161.7 120.1) (layer F.SilkS))
  (gr_text 5V (at 101.95 112.625) (layer B.SilkS))
  (gr_text GND (at 107.075 112.6) (layer F.SilkS))
  (gr_text "5V In" (at 105.3 122.7) (layer F.SilkS))
  (gr_text "5V OK" (at 117.5 121.25 90) (layer F.SilkS))
  (gr_text "5V Out" (at 115.95 124.75) (layer F.SilkS))
  (gr_line (start 100 103) (end 100 127.5) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 103 100) (end 162 100) (layer Edge.Cuts) (width 0.2))
  (gr_arc (start 103 103) (end 103 100) (angle -90) (layer Edge.Cuts) (width 0.2))
  (gr_arc (start 162 103) (end 165 103) (angle -90) (layer Edge.Cuts) (width 0.2))
  (gr_arc (start 162 127.5) (end 162 130.5) (angle -90) (layer Edge.Cuts) (width 0.2))
  (gr_arc (start 103 127.5) (end 100 127.5) (angle -90) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 162 130.5) (end 103 130.5) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 165 103) (end 165 127.5) (layer Edge.Cuts) (width 0.2))
  (zone (net 3) (net_name GND) (layer B.Cu) (hatch none 0.508)
    (connect_pads yes (clearance 0))
    (min_thickness 0.15)
    (fill yes (mode segment) (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508) (smoothing chamfer))
    (polygon
      (pts
        (xy 98.75 98.45) (xy 165.5 98.45) (xy 165.55 130.95) (xy 98.55 131.05)
      )
    )
  )
)
