(kicad_pcb (version 20171130) (host pcbnew "(5.1.2-1)-1")
  (general
    (thickness 0.8)
    (drawings 8)
    (tracks 41)
    (zones 0)
    (modules 10)
    (nets 16)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user hide)
    (33 F.Adhes user hide)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user hide)
    (44 Edge.Cuts user)
    (45 Margin user hide)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user)
    (48 B.Fab user hide)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.1524)
    (user_trace_width 0.25)
    (user_trace_width 0.28)
    (user_trace_width 0.3)
    (user_trace_width 0.35)
    (user_trace_width 0.4)
    (user_trace_width 0.5)
    (user_trace_width 1)
    (trace_clearance 0.1524)
    (zone_clearance 0.254)
    (zone_45_only no)
    (trace_min 0.1524)
    (via_size 0.508)
    (via_drill 0.254)
    (via_min_size 0.508)
    (via_min_drill 0.254)
    (uvia_size 0.508)
    (uvia_drill 0.254)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.15)
    (segment_width 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.35 1.35)
    (pad_drill 0.8)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (grid_origin 125 89)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(C2-Pad2)")
  (net 2 "Net-(C2-Pad1)")
  (net 3 "Net-(R6-Pad2)")
  (net 4 "Net-(U2-Pad8)")
  (net 5 "Net-(U2-Pad5)")
  (net 6 "Net-(U2-Pad1)")
  (net 7 "Net-(J14-Pad1)")
  (net 8 "Net-(J16-Pad1)")
  (net 9 "Net-(J1-Pad2)")
  (net 10 "Net-(J2-Pad4)")
  (net 11 "Net-(J2-Pad3)")
  (net 12 "Net-(J2-Pad2)")
  (net 13 "Net-(J2-Pad1)")
  (net 14 "Net-(J4-Pad3)")
  (net 15 "Net-(J4-Pad1)")
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.508)
    (via_drill 0.254)
    (uvia_dia 0.508)
    (uvia_drill 0.254)
  )
  (net_class SMD ""
    (clearance 0.1524)
    (trace_width 0.254)
    (via_dia 0.508)
    (via_drill 0.254)
    (uvia_dia 0.508)
    (uvia_drill 0.254)
  )
  (net_class grounds ""
    (clearance 0.254)
    (trace_width 1)
    (via_dia 0.762)
    (via_drill 0.381)
    (uvia_dia 0.762)
    (uvia_drill 0.381)
  )
  (net_class power ""
    (clearance 0.254)
    (trace_width 1)
    (via_dia 0.762)
    (via_drill 0.254)
    (uvia_dia 0.508)
    (uvia_drill 0.254)
  )
  (net_class signal ""
    (clearance 0.2)
    (trace_width 0.6096)
    (via_dia 0.762)
    (via_drill 0.381)
    (uvia_dia 0.762)
    (uvia_drill 0.381)
    (add_net "Net-(C2-Pad1)")
    (add_net "Net-(C2-Pad2)")
    (add_net "Net-(J1-Pad2)")
    (add_net "Net-(J14-Pad1)")
    (add_net "Net-(J16-Pad1)")
    (add_net "Net-(J2-Pad1)")
    (add_net "Net-(J2-Pad2)")
    (add_net "Net-(J2-Pad3)")
    (add_net "Net-(J2-Pad4)")
    (add_net "Net-(J4-Pad1)")
    (add_net "Net-(J4-Pad3)")
    (add_net "Net-(R6-Pad2)")
    (add_net "Net-(U2-Pad1)")
    (add_net "Net-(U2-Pad5)")
    (add_net "Net-(U2-Pad8)")
  )
  (net_class soic ""
    (clearance 0.1524)
    (trace_width 0.4)
    (via_dia 0.508)
    (via_drill 0.254)
    (uvia_dia 0.508)
    (uvia_drill 0.254)
  )
  (module Duallys:Kemet-33nF (layer F.Cu) (tedit 5FDBED7D)
    (at 134 66.4 180)
    (descr "C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*5.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf")
    (tags "C Rect series Radial pin pitch 5.00mm  length 7.2mm width 5.5mm Capacitor")
    (fp_text reference C2 (at 2.5 0 90) (layer F.SilkS))
    (fp_text value 33n (at 2.5 3.6) (layer F.SilkS) hide)
    (pad 2 smd roundrect (at 3.9 0 180) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 "Net-(C2-Pad2)"))
    (pad 1 smd roundrect (at 1.1 0 180) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 "Net-(C2-Pad1)"))
    (pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 1 "Net-(C2-Pad2)"))
    (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C2-Pad1)"))
    (model ${KIPRJMOD}/Lib/3D/Kem-PHE-33n.step
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_1206_3216Metric (layer B.Cu) (tedit 5B301BBD)
    (at 131.5 70.3)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R2 (at 0 0 270) (layer B.SilkS))
    (fp_text value 2k26 (at 0 -1.82) (layer B.Fab))
    (fp_text user %R (at 0 0) (layer B.Fab))
    (pad 2 smd roundrect (at 1.4 0) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 2 "Net-(C2-Pad1)"))
    (pad 1 smd roundrect (at -1.4 0) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 1 "Net-(C2-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_1206_3216Metric (layer B.Cu) (tedit 5B301BBD)
    (at 130.4 76.9 90)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R4 (at 0 0) (layer B.SilkS))
    (fp_text value 6k65 (at 0 -1.82 90) (layer B.Fab))
    (fp_text user %R (at 0 0 90) (layer B.Fab))
    (pad 2 smd roundrect (at 1.4 0 90) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 1 "Net-(C2-Pad2)"))
    (pad 1 smd roundrect (at -1.4 0 90) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 12 "Net-(J2-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Resistor_SMD:R_1206_3216Metric (layer B.Cu) (tedit 5B301BBD)
    (at 131.5 72.9 180)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R6 (at 0 0 270) (layer B.SilkS))
    (fp_text value 75 (at 0 -1.82) (layer B.Fab))
    (fp_text user %R (at 0 0) (layer B.Fab))
    (pad 2 smd roundrect (at 1.4 0 180) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 3 "Net-(R6-Pad2)"))
    (pad 1 smd roundrect (at -1.4 0 180) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 1 "Net-(C2-Pad2)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Duallys:Combo-4P-Preci-B (layer F.Cu) (tedit 5FD78565)
    (at 127.7 84.5)
    (descr "Through hole angled pin header, 1x04, 2.54mm pitch, 6mm pin length, single row")
    (tags "Through hole angled pin header THT 1x04 2.54mm single row")
    (fp_text reference J2 (at 3.86 -1.67) (layer F.SilkS) hide)
    (fp_text value "5 6 7 8" (at 4.14 8.96) (layer F.Fab))
    (fp_text user %R (at 3.82 5.94) (layer F.Fab))
    (pad 4 thru_hole circle (at 7.62 0 270) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 10 "Net-(J2-Pad4)"))
    (pad 3 thru_hole circle (at 5.08 0 270) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad3)"))
    (pad 2 thru_hole circle (at 2.54 0 270) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 1 thru_hole circle (at 0 0 270) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 13 "Net-(J2-Pad1)"))
    (pad 4 thru_hole rect (at 7.62 3 270) (size 3 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 10 "Net-(J2-Pad4)"))
    (pad 3 thru_hole rect (at 5.08 3 270) (size 3 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad3)"))
    (pad 2 thru_hole rect (at 2.54 3 270) (size 3 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 1 thru_hole rect (at 0 3 270) (size 3 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 13 "Net-(J2-Pad1)"))
    (model ${KIPRJMOD}/lib/3d/preci-dip_399.stp
      (offset (xyz 3.81 -1.55 1.27))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 180 180))
    )
  )
  (module Duallys:PinHeader_1x05_P2mm_WithOut (layer B.Cu) (tedit 5FDE3678)
    (at 135.5 81.5 90)
    (descr "Through hole straight pin header, 1x05, 2.00mm pitch, single row")
    (tags "Through hole pin header THT 1x05 2.00mm single row")
    (fp_text reference J4 (at 0 2.06 90) (layer B.SilkS) hide)
    (fp_text value Conn_01x05 (at 0 -10.06 90) (layer B.Fab))
    (fp_text user %R (at 0 -4 180) (layer B.Fab))
    (pad 1 thru_hole circle (at 0 0 90) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
      (net 15 "Net-(J4-Pad1)"))
    (pad 2 thru_hole oval (at 0 -2 90) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
      (net 9 "Net-(J1-Pad2)"))
    (pad 3 thru_hole oval (at 0 -4 90) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
      (net 14 "Net-(J4-Pad3)"))
    (pad 4 thru_hole oval (at 0 -6 90) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad2)"))
    (pad 5 thru_hole oval (at 0 -8 90) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad3)"))
  )
  (module Duallys:ThruPoint_THT_D1.5mm_Drill0.7mm (layer F.Cu) (tedit 5FD4F26B)
    (at 126.4 66.4)
    (descr "THT pad as test Point, diameter 1.5mm, hole diameter 0.7mm")
    (tags "test point THT pad")
    (attr virtual)
    (fp_text reference J14 (at 0 -1.648) (layer F.Fab))
    (fp_text value Tie (at 0 1.75) (layer F.Fab))
    (fp_text user %R (at 0 -1.65) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 7 "Net-(J14-Pad1)"))
  )
  (module Duallys:ThruPoint_THT_D1.5mm_Drill0.7mm (layer F.Cu) (tedit 5FD4F26B)
    (at 136.6 66.4)
    (descr "THT pad as test Point, diameter 1.5mm, hole diameter 0.7mm")
    (tags "test point THT pad")
    (attr virtual)
    (fp_text reference J16 (at 0 -1.648) (layer F.Fab))
    (fp_text value Tie (at 0 1.75) (layer F.Fab))
    (fp_text user %R (at 0 -1.65) (layer F.Fab))
    (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.7) (layers *.Cu *.Mask)
      (net 8 "Net-(J16-Pad1)"))
  )
  (module "Duallys:R_1206(0805)combo" (layer B.Cu) (tedit 5FE133FD)
    (at 132.8 76.9 270)
    (descr "Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
    (tags resistor)
    (attr smd)
    (fp_text reference R8 (at 0 -0.05 180) (layer B.SilkS))
    (fp_text value 105 (at 0 -1.82 90) (layer B.Fab))
    (fp_text user %R (at 0 0 90) (layer B.Fab))
    (pad 2 smd roundrect (at 1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)
      (net 9 "Net-(J1-Pad2)"))
    (pad 1 smd roundrect (at -1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)
      (net 2 "Net-(C2-Pad1)"))
    (pad 2 smd roundrect (at 1.4 0 270) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 9 "Net-(J1-Pad2)"))
    (pad 1 smd roundrect (at -1.4 0 270) (size 1.25 1.75) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
      (net 2 "Net-(C2-Pad1)"))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_1206_3216Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Package_DIP:DIP-8_W7.62mm_Socket (layer F.Cu) (tedit 5A02E8C5)
    (at 135.4 77.95 180)
    (descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket")
    (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket")
    (fp_text reference U2 (at 3.81 3.75) (layer F.SilkS))
    (fp_text value OPA1641 (at 3.81 9.95) (layer F.Fab))
    (fp_text user %R (at 3.81 3.81) (layer F.Fab))
    (pad 8 thru_hole oval (at 7.62 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 4 "Net-(U2-Pad8)"))
    (pad 4 thru_hole oval (at 0 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 14 "Net-(J4-Pad3)"))
    (pad 7 thru_hole oval (at 7.62 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad3)"))
    (pad 3 thru_hole oval (at 0 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 15 "Net-(J4-Pad1)"))
    (pad 6 thru_hole oval (at 7.62 5.08 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 3 "Net-(R6-Pad2)"))
    (pad 2 thru_hole oval (at 0 2.54 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 2 "Net-(C2-Pad1)"))
    (pad 5 thru_hole oval (at 7.62 7.62 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 5 "Net-(U2-Pad5)"))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
      (net 6 "Net-(U2-Pad1)"))
    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-8_W7.62mm_Socket.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text B (at 131.5 67.4) (layer B.SilkS))
  (gr_text 8 (at 137.3 85.6) (layer F.SilkS))
  (gr_text 5 (at 125.7 85.6) (layer F.SilkS))
  (gr_line (start 125 89) (end 138 89) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 125 64) (end 125 89) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 138 64) (end 125 64) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 138 89) (end 138 64) (layer Edge.Cuts) (width 0.05))
  (zone (net 9) (net_name "Net-(J1-Pad2)") (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.254))
    (min_thickness 0.254)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 125 64) (xy 125 85.5) (xy 138 85.5) (xy 138 64)
      )
    )
  )
  (zone (net 0) (net_name "") (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.254))
    (min_thickness 0.254)
    (keepout (tracks allowed) (vias allowed) (copperpour not_allowed))
    (fill (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 134.2 81.5) (xy 134.2 79) (xy 132.5 79) (xy 132.5 79.8) (xy 132.8 80.5)
        (xy 132.8 81.5)
      )
    )
  )
)
