(kicad_pcb (version 20171130) (host pcbnew 5.0.0+dfsg1-2)
  (general
    (thickness 1.6)
    (drawings 9)
    (tracks 97)
    (zones 0)
    (modules 4)
    (nets 26)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.7272 1.7272)
    (pad_drill 1.016)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(A8_J3-Pad10)")
  (net 2 "Net-(A8_J3-Pad9)")
  (net 3 "Net-(A8_J3-Pad7)")
  (net 4 "Net-(A8_J3-Pad6)")
  (net 5 "Net-(A8_J3-Pad5)")
  (net 6 "Net-(A8_J3-Pad4)")
  (net 7 "Net-(A8_J3-Pad3)")
  (net 8 "Net-(A8_J3-Pad2)")
  (net 9 "Net-(A8_J3-Pad1)")
  (net 10 "Net-(A8_LCD1-Pad2)")
  (net 11 "Net-(A8_LCD1-Pad3)")
  (net 12 "Net-(A8_LCD1-Pad4)")
  (net 13 "Net-(A8_LCD1-Pad5)")
  (net 14 "Net-(A8_LCD1-Pad6)")
  (net 15 "Net-(A8_LCD1-Pad7)")
  (net 16 "Net-(A8_LCD1-Pad8)")
  (net 17 "Net-(A8_LCD1-Pad9)")
  (net 18 "Net-(A8_LCD1-Pad10)")
  (net 19 "Net-(LCD_J1-Pad6)")
  (net 20 "Net-(LCD_J1-Pad7)")
  (net 21 "Net-(LCD_J1-Pad8)")
  (net 22 "Net-(LCD_J2-Pad10)")
  (net 23 "Net-(LCD_J2-Pad7)")
  (net 24 "Net-(LCD_J2-Pad4)")
  (net 25 GND)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net "Net-(A8_J3-Pad1)")
    (add_net "Net-(A8_J3-Pad10)")
    (add_net "Net-(A8_J3-Pad2)")
    (add_net "Net-(A8_J3-Pad3)")
    (add_net "Net-(A8_J3-Pad4)")
    (add_net "Net-(A8_J3-Pad5)")
    (add_net "Net-(A8_J3-Pad6)")
    (add_net "Net-(A8_J3-Pad7)")
    (add_net "Net-(A8_J3-Pad9)")
    (add_net "Net-(A8_LCD1-Pad10)")
    (add_net "Net-(A8_LCD1-Pad2)")
    (add_net "Net-(A8_LCD1-Pad3)")
    (add_net "Net-(A8_LCD1-Pad4)")
    (add_net "Net-(A8_LCD1-Pad5)")
    (add_net "Net-(A8_LCD1-Pad6)")
    (add_net "Net-(A8_LCD1-Pad7)")
    (add_net "Net-(A8_LCD1-Pad8)")
    (add_net "Net-(A8_LCD1-Pad9)")
    (add_net "Net-(LCD_J1-Pad6)")
    (add_net "Net-(LCD_J1-Pad7)")
    (add_net "Net-(LCD_J1-Pad8)")
    (add_net "Net-(LCD_J2-Pad10)")
    (add_net "Net-(LCD_J2-Pad4)")
    (add_net "Net-(LCD_J2-Pad7)")
  )
  (module Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical (layer F.Cu) (tedit 59DE0611)
    (at 104.14 130.81 180)
    (descr "Through hole straight IDC box header, 2x05, 2.54mm pitch, double rows")
    (tags "Through hole IDC box header THT 2x05 2.54mm double row")
    (fp_text reference LCD_J1 (at 1.27 -6.604 180) (layer F.SilkS))
    (fp_text value LCD_J1 (at 1.27 16.764 180) (layer F.Fab))
    (fp_text user %R (at 1.27 5.08 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 "Net-(A8_LCD1-Pad5)"))
    (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 16 "Net-(A8_LCD1-Pad8)"))
    (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 "Net-(A8_LCD1-Pad7)"))
    (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 17 "Net-(A8_LCD1-Pad9)"))
    (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 18 "Net-(A8_LCD1-Pad10)"))
    (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 19 "Net-(LCD_J1-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 20 "Net-(LCD_J1-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 21 "Net-(LCD_J1-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 25 GND))
    (pad 10 thru_hole oval (at 2.54 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 10 "Net-(A8_LCD1-Pad2)"))
    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x05_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
    (model /home/user/anet/pcb/AB2_HDR_M05-2V-S-3M.wrl
      (offset (xyz 1.25 -5.1 0.5))
      (scale (xyz 0.395 0.4 0.4))
      (rotate (xyz 0 0 90))
    )
  )
  (module Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical (layer F.Cu) (tedit 5C76BC15)
    (at 91.44 105.41 180)
    (descr "Through hole straight IDC box header, 2x05, 2.54mm pitch, double rows")
    (tags "Through hole IDC box header THT 2x05 2.54mm double row")
    (fp_text reference A8_J3 (at 1.27 -6.604 180) (layer F.SilkS))
    (fp_text value A8_J3 (at 1.27 16.764 180) (layer F.Fab))
    (fp_text user %R (at 1.27 5.08 180) (layer F.Fab))
    (pad 10 thru_hole oval (at 2.54 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 "Net-(A8_J3-Pad10)"))
    (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 "Net-(A8_J3-Pad9)"))
    (pad 8 thru_hole oval (at 2.54 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 25 GND))
    (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 "Net-(A8_J3-Pad7)"))
    (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 "Net-(A8_J3-Pad6)"))
    (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 "Net-(A8_J3-Pad5)"))
    (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 6 "Net-(A8_J3-Pad4)"))
    (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 "Net-(A8_J3-Pad3)"))
    (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 8 "Net-(A8_J3-Pad2)"))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 9 "Net-(A8_J3-Pad1)"))
    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x05_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
    (model /home/user/anet/pcb/AB2_HDR_M05-2V-S-3M.wrl
      (offset (xyz 1.25 -5.1 0.5))
      (scale (xyz 0.395 0.4 0.4))
      (rotate (xyz 0 0 90))
    )
  )
  (module Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical (layer F.Cu) (tedit 59DE0611)
    (at 91.44 130.81 180)
    (descr "Through hole straight IDC box header, 2x05, 2.54mm pitch, double rows")
    (tags "Through hole IDC box header THT 2x05 2.54mm double row")
    (fp_text reference A8_LCD1 (at 1.27 -6.604 180) (layer F.SilkS))
    (fp_text value A8_LCD (at 1.27 16.764 180) (layer F.Fab))
    (fp_text user %R (at 1.27 5.08 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 25 GND))
    (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 10 "Net-(A8_LCD1-Pad2)"))
    (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 11 "Net-(A8_LCD1-Pad3)"))
    (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 12 "Net-(A8_LCD1-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 13 "Net-(A8_LCD1-Pad5)"))
    (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 14 "Net-(A8_LCD1-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 15 "Net-(A8_LCD1-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 16 "Net-(A8_LCD1-Pad8)"))
    (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 17 "Net-(A8_LCD1-Pad9)"))
    (pad 10 thru_hole oval (at 2.54 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 18 "Net-(A8_LCD1-Pad10)"))
    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x05_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
    (model /home/user/anet/pcb/AB2_HDR_M05-2V-S-3M.wrl
      (offset (xyz 1.25 -5.1 0.5))
      (scale (xyz 0.395 0.4 0.4))
      (rotate (xyz 0 0 90))
    )
  )
  (module Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical (layer F.Cu) (tedit 5C76BC82)
    (at 104.14 105.41 180)
    (descr "Through hole straight IDC box header, 2x05, 2.54mm pitch, double rows")
    (tags "Through hole IDC box header THT 2x05 2.54mm double row")
    (fp_text reference LCD_J2 (at 1.27 -6.604 180) (layer F.SilkS))
    (fp_text value LCD_J2 (at 1.27 16.764 180) (layer F.Fab))
    (fp_text user %R (at 1.27 5.08 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 7 "Net-(A8_J3-Pad3)"))
    (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 5 "Net-(A8_J3-Pad5)"))
    (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 12 "Net-(A8_LCD1-Pad4)"))
    (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 24 "Net-(LCD_J2-Pad4)"))
    (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 14 "Net-(A8_LCD1-Pad6)"))
    (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 "Net-(A8_J3-Pad6)"))
    (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 23 "Net-(LCD_J2-Pad7)"))
    (pad 8 thru_hole oval (at 2.54 7.62 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 "Net-(A8_J3-Pad7)"))
    (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 25 GND))
    (pad 10 thru_hole oval (at 2.54 10.16 180) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
      (net 22 "Net-(LCD_J2-Pad10)"))
    (model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x05_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
    (model /home/user/anet/pcb/AB2_HDR_M05-2V-S-3M.x3d
      (offset (xyz 1.25 -5.1 0.5))
      (scale (xyz 0.395 0.4 0.4))
      (rotate (xyz 0 0 90))
    )
  )
  (gr_text "ANET v1 <=> LCD 12864" (at 96.52 111.76 -90) (layer B.SilkS))
  (gr_arc (start 85.09 88.9) (end 85.09 87.63) (angle -90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 85.09 137.16) (end 83.82 137.16) (angle -90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 107.95 137.16) (end 107.95 138.43) (angle -90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 107.95 88.9) (end 109.22 88.9) (angle -90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 85.09 87.63) (end 107.95 87.63) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 83.82 137.16) (end 83.82 88.9) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 107.95 138.43) (end 85.09 138.43) (layer Edge.Cuts) (width 0.2))
  (gr_line (start 109.22 88.9) (end 109.22 137.16) (layer Edge.Cuts) (width 0.2))
  (zone (net 25) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 85.09 137.16) (xy 107.95 137.16) (xy 107.95 88.9) (xy 85.09 88.9)
      )
    )
  )
  (zone (net 25) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 85.09 137.16) (xy 107.95 137.16) (xy 107.95 88.9) (xy 85.09 88.9)
      )
    )
  )
)
