(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4~bpo8+1)
  (general
    (links 8)
    (no_connects 0)
    (area 32.309999 29.769999 48.970001 41.350001)
    (thickness 1.6)
    (drawings 14)
    (tracks 16)
    (zones 0)
    (modules 9)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.4064)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only yes)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0)
    (uvia_min_drill 0)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (grid_origin 100.33 49.53)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 "Net-(P1-Pad1)")
  (net 2 "Net-(P1-Pad4)")
  (net 3 "Net-(P1-Pad3)")
  (net 4 "Net-(P1-Pad2)")
  (net 5 "Net-(P1-Pad5)")
  (net 6 "Net-(P1-Pad6)")
  (net 7 "Net-(P1-Pad7)")
  (net 8 "Net-(P1-Pad8)")
  (net_class Default "This is the default net class."
    (clearance 0.254)
    (trace_width 0.4064)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net "Net-(P1-Pad1)")
    (add_net "Net-(P1-Pad2)")
    (add_net "Net-(P1-Pad3)")
    (add_net "Net-(P1-Pad4)")
    (add_net "Net-(P1-Pad5)")
    (add_net "Net-(P1-Pad6)")
    (add_net "Net-(P1-Pad7)")
    (add_net "Net-(P1-Pad8)")
  )
  (module Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm (layer F.Cu) (tedit 5904DE2C)
    (at 40.64 35.56)
    (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference P1 (at 0 -3.5) (layer F.SilkS) hide)
    (fp_text value DIL8 (at 0 3.5) (layer F.Fab) hide)
    (pad 1 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(P1-Pad1)"))
    (pad 2 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(P1-Pad2)"))
    (pad 3 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(P1-Pad3)"))
    (pad 4 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(P1-Pad4)"))
    (pad 5 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(P1-Pad5)"))
    (pad 6 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(P1-Pad6)"))
    (pad 7 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 "Net-(P1-Pad7)"))
    (pad 8 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(P1-Pad8)"))
    (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE42)
    (at 34.29 31.75)
    (fp_text reference W1 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 1 "Net-(P1-Pad1)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE4D)
    (at 34.29 34.29)
    (fp_text reference W2 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 4 "Net-(P1-Pad2)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE71)
    (at 34.29 36.83)
    (fp_text reference W3 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 3 "Net-(P1-Pad3)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE83)
    (at 34.29 39.37)
    (fp_text reference W4 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 2 "Net-(P1-Pad4)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DEA7)
    (at 46.99 39.37)
    (fp_text reference W5 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 5 "Net-(P1-Pad5)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DEA1)
    (at 46.99 36.83)
    (fp_text reference W6 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 6 "Net-(P1-Pad6)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE9D)
    (at 46.99 34.29)
    (fp_text reference W7 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 7 "Net-(P1-Pad7)"))
  )
  (module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5904DE93)
    (at 46.99 31.75)
    (fp_text reference W8 (at 0 -2.54) (layer F.SilkS) hide)
    (fp_text value TEST_1P (at 0 2.54) (layer F.Fab) hide)
    (pad 1 thru_hole circle (at 0 0) (size 1.99898 1.99898) (drill 0.8001) (layers *.Cu *.Mask)
      (net 8 "Net-(P1-Pad8)"))
  )
  (dimension 16.51 (width 0.3) (layer Dwgs.User)
    (gr_text "16.510 mm" (at 40.64 25.955) (layer Dwgs.User))
    (feature1 (pts (xy 32.385 28.575) (xy 32.385 24.605)))
    (feature2 (pts (xy 48.895 28.575) (xy 48.895 24.605)))
    (crossbar (pts (xy 48.895 27.305) (xy 32.385 27.305)))
    (arrow1a (pts (xy 32.385 27.305) (xy 33.511504 26.718579)))
    (arrow1b (pts (xy 32.385 27.305) (xy 33.511504 27.891421)))
    (arrow2a (pts (xy 48.895 27.305) (xy 47.768496 26.718579)))
    (arrow2b (pts (xy 48.895 27.305) (xy 47.768496 27.891421)))
  )
  (dimension 11.43 (width 0.3) (layer Dwgs.User)
    (gr_text "11.430 mm" (at 53.42 35.56 270) (layer Dwgs.User))
    (feature1 (pts (xy 50.165 41.275) (xy 54.77 41.275)))
    (feature2 (pts (xy 50.165 29.845) (xy 54.77 29.845)))
    (crossbar (pts (xy 52.07 29.845) (xy 52.07 41.275)))
    (arrow1a (pts (xy 52.07 41.275) (xy 51.483579 40.148496)))
    (arrow1b (pts (xy 52.07 41.275) (xy 52.656421 40.148496)))
    (arrow2a (pts (xy 52.07 29.845) (xy 51.483579 30.971504)))
    (arrow2b (pts (xy 52.07 29.845) (xy 52.656421 30.971504)))
  )
  (gr_line (start 48.895 40.64) (end 48.895 30.48) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 32.385 31.115) (end 32.385 40.64) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 33.655 29.845) (end 48.26 29.845) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 48.26 41.275) (end 33.02 41.275) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_text "3.9 x 4.9" (at 43.18 32.385) (layer F.SilkS))
  (gr_text Notes: (at 42.545 31.115) (layer B.SilkS))
  (gr_arc (start 33.02 40.64) (end 33.02 41.275) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 48.26 40.64) (end 48.895 40.64) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 48.26 30.48) (end 48.26 29.845) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_text "SOIC-8 Adapter" (at 40.64 31.115) (layer F.SilkS))
  (gr_line (start 32.385 31.115) (end 33.655 29.845) (angle 90) (layer Edge.Cuts) (width 0.15))
  (zone (net 0) (net_name "") (layer B.SilkS) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 45.72 33.02) (xy 45.72 39.37) (xy 44.45 40.64) (xy 36.83 40.64) (xy 35.56 39.37)
        (xy 35.56 33.02) (xy 36.83 31.75) (xy 44.45 31.75)
      )
    )
  )
  (zone (net 0) (net_name "") (layer F.SilkS) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 45.72 38.735) (xy 45.72 40.005) (xy 45.085 40.64) (xy 36.195 40.64) (xy 35.56 40.005)
        (xy 35.56 38.735) (xy 36.195 38.1) (xy 45.085 38.1)
      )
    )
  )
)
