(kicad_pcb (version 20171130) (host pcbnew "(5.1.6)-1")
  (general
    (thickness 1.6)
    (drawings 105)
    (tracks 141)
    (zones 0)
    (modules 7)
    (nets 44)
  )
  (page A4)
  (layers
    (0 F.Cu power)
    (1 In1.Cu signal)
    (2 In2.Cu signal)
    (31 B.Cu power)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user hide)
    (47 F.CrtYd user hide)
    (48 B.Fab user)
    (49 F.Fab user hide)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.05)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFD7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 LED2)
  (net 2 LED1)
  (net 3 LED0)
  (net 4 3.3v+)
  (net 5 VREGEN)
  (net 6 SPKR-RP)
  (net 7 SPKR-RN)
  (net 8 SPKR-LP)
  (net 9 SPKR-LN)
  (net 10 GND)
  (net 11 UART_CTS)
  (net 12 UART_TX)
  (net 13 UART_RX)
  (net 14 UART_RTS-DTR)
  (net 15 RESET_ActiveHi)
  (net 16 SPI-PCM_SELECT)
  (net 17 I2S_SYNC)
  (net 18 I2S_DCLK)
  (net 19 I2S_DOUT)
  (net 20 I2S_DIN)
  (net 21 "Net-(U1-Pad5)")
  (net 22 "Net-(U1-Pad6)")
  (net 23 "Net-(U1-Pad7)")
  (net 24 "Net-(U1-Pad8)")
  (net 25 "Net-(U1-Pad9)")
  (net 26 "Net-(U1-Pad10)")
  (net 27 "Net-(U1-Pad12)")
  (net 28 "Net-(U1-Pad17)")
  (net 29 "Net-(U1-Pad18)")
  (net 30 "Net-(U1-Pad19)")
  (net 31 "Net-(U1-Pad20)")
  (net 32 "Net-(U1-Pad21)")
  (net 33 "Net-(U1-Pad35)")
  (net 34 "Net-(U1-Pad23)")
  (net 35 "Net-(U1-Pad24)")
  (net 36 "Net-(U1-Pad25)")
  (net 37 "Net-(U1-Pad26)")
  (net 38 "Net-(U1-Pad29)")
  (net 39 "Net-(U1-Pad30)")
  (net 40 "Net-(U1-Pad31)")
  (net 41 "Net-(U1-Pad36)")
  (net 42 "Net-(U1-Pad50)")
  (net 43 "Net-(U1-Pad51)")
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net 3.3v+)
    (add_net GND)
    (add_net I2S_DCLK)
    (add_net I2S_DIN)
    (add_net I2S_DOUT)
    (add_net I2S_SYNC)
    (add_net LED0)
    (add_net LED1)
    (add_net LED2)
    (add_net "Net-(U1-Pad10)")
    (add_net "Net-(U1-Pad12)")
    (add_net "Net-(U1-Pad17)")
    (add_net "Net-(U1-Pad18)")
    (add_net "Net-(U1-Pad19)")
    (add_net "Net-(U1-Pad20)")
    (add_net "Net-(U1-Pad21)")
    (add_net "Net-(U1-Pad23)")
    (add_net "Net-(U1-Pad24)")
    (add_net "Net-(U1-Pad25)")
    (add_net "Net-(U1-Pad26)")
    (add_net "Net-(U1-Pad29)")
    (add_net "Net-(U1-Pad30)")
    (add_net "Net-(U1-Pad31)")
    (add_net "Net-(U1-Pad35)")
    (add_net "Net-(U1-Pad36)")
    (add_net "Net-(U1-Pad5)")
    (add_net "Net-(U1-Pad50)")
    (add_net "Net-(U1-Pad51)")
    (add_net "Net-(U1-Pad6)")
    (add_net "Net-(U1-Pad7)")
    (add_net "Net-(U1-Pad8)")
    (add_net "Net-(U1-Pad9)")
    (add_net RESET_ActiveHi)
    (add_net SPI-PCM_SELECT)
    (add_net SPKR-LN)
    (add_net SPKR-LP)
    (add_net SPKR-RN)
    (add_net SPKR-RP)
    (add_net UART_CTS)
    (add_net UART_RTS-DTR)
    (add_net UART_RX)
    (add_net UART_TX)
    (add_net VREGEN)
  )
  (module Socket_Strips:Socket_Strip_Straight_1x07_Pitch2.54mm (layer F.Cu) (tedit 5F96601B)
    (at 148.717 96.52 180)
    (descr "Through hole straight socket strip, 1x07, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x07 2.54mm single row")
    (fp_text reference J3 (at 0 -2.33 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x07_MountingPin (at 0 17.57 180) (layer F.Fab))
    (fp_text user %R (at 0 -2.33 180) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 UART_TX))
    (pad 2 thru_hole rect (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 UART_RX))
    (pad 3 thru_hole rect (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 RESET_ActiveHi))
    (pad 4 thru_hole rect (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 I2S_SYNC))
    (pad 5 thru_hole rect (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 I2S_DCLK))
    (pad 6 thru_hole rect (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 20 I2S_DIN))
    (pad 7 thru_hole rect (at 0 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 19 I2S_DOUT))
  )
  (module Socket_Strips:Socket_Strip_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 5F965FAF)
    (at 133.35 100.965 90)
    (descr "Through hole straight socket strip, 1x06, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x06 2.54mm single row")
    (fp_text reference J2 (at 0 -2.33 90) (layer F.SilkS) hide)
    (fp_text value 3 (at 0 15.03 90) (layer F.Fab))
    (fp_text user %R (at 0 -2.33 90) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 LED2))
    (pad 2 thru_hole rect (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 LED1))
    (pad 3 thru_hole rect (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 LED0))
    (pad 4 thru_hole rect (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 UART_RTS-DTR))
    (pad 5 thru_hole rect (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 UART_CTS))
    (pad 6 thru_hole rect (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 SPI-PCM_SELECT))
  )
  (module Socket_Strips:Socket_Strip_Straight_1x07_Pitch2.54mm (layer F.Cu) (tedit 5F965F4E)
    (at 130.683 81.28)
    (descr "Through hole straight socket strip, 1x07, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x07 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value Conn_01x07_MountingPin (at 0 17.57) (layer F.Fab))
    (fp_text user %R (at 0 -2.33) (layer F.Fab))
    (pad 7 thru_hole rect (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 3.3v+))
    (pad 6 thru_hole rect (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 VREGEN))
    (pad 5 thru_hole rect (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 SPKR-RP))
    (pad 4 thru_hole rect (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 SPKR-RN))
    (pad 3 thru_hole rect (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 SPKR-LP))
    (pad 2 thru_hole rect (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 SPKR-LN))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 GND))
  )
  (module Socket_Strips:Socket_Strip_Straight_1x07_Pitch2.54mm (layer F.Cu) (tedit 5F96601B)
    (at 147.32 96.52 180)
    (descr "Through hole straight socket strip, 1x07, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x07 2.54mm single row")
    (fp_text reference J3 (at 0 -2.33 180) (layer F.SilkS) hide)
    (fp_text value Conn_01x07_MountingPin (at 0 17.57 180) (layer F.Fab))
    (fp_text user %R (at 0 -2.33 180) (layer F.Fab))
    (pad 7 thru_hole rect (at 0 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 19 I2S_DOUT))
    (pad 6 thru_hole rect (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 20 I2S_DIN))
    (pad 5 thru_hole rect (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 I2S_DCLK))
    (pad 4 thru_hole rect (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 I2S_SYNC))
    (pad 3 thru_hole rect (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 RESET_ActiveHi))
    (pad 2 thru_hole rect (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 UART_RX))
    (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 UART_TX))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x07_P2.54mm_Vertical.step
      (offset (xyz 0 -15.25 -1.75))
      (scale (xyz 1 1 1))
      (rotate (xyz 180 0 0))
    )
  )
  (module Socket_Strips:Socket_Strip_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 5F965FAF)
    (at 133.35 99.568 90)
    (descr "Through hole straight socket strip, 1x06, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x06 2.54mm single row")
    (fp_text reference J2 (at 0 -2.33 90) (layer F.SilkS) hide)
    (fp_text value 3 (at 0 15.03 90) (layer F.Fab))
    (fp_text user %R (at 0 -2.33 90) (layer F.Fab))
    (pad 6 thru_hole rect (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 SPI-PCM_SELECT))
    (pad 5 thru_hole rect (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 UART_CTS))
    (pad 4 thru_hole rect (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 UART_RTS-DTR))
    (pad 3 thru_hole rect (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 LED0))
    (pad 2 thru_hole rect (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 LED1))
    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 LED2))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Vertical.step
      (offset (xyz 0 -12.75 -1.75))
      (scale (xyz 1 1 1))
      (rotate (xyz 180 0 0))
    )
  )
  (module Socket_Strips:Socket_Strip_Straight_1x07_Pitch2.54mm (layer F.Cu) (tedit 5F965F4E)
    (at 132.08 81.28)
    (descr "Through hole straight socket strip, 1x07, 2.54mm pitch, single row")
    (tags "Through hole socket strip THT 1x07 2.54mm single row")
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS) hide)
    (fp_text value Conn_01x07_MountingPin (at 0 17.57) (layer F.Fab))
    (fp_text user %R (at 0 -2.33) (layer F.Fab))
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 GND))
    (pad 2 thru_hole rect (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 SPKR-LN))
    (pad 3 thru_hole rect (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 SPKR-LP))
    (pad 4 thru_hole rect (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 SPKR-RN))
    (pad 5 thru_hole rect (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 SPKR-RP))
    (pad 6 thru_hole rect (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 VREGEN))
    (pad 7 thru_hole rect (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 3.3v+))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x07_P2.54mm_Vertical.step
      (offset (xyz 0 -15.25 -1.75))
      (scale (xyz 1 1 1))
      (rotate (xyz 180 0 0))
    )
  )
  (module LGA51-0.8-18X11.8MM (layer F.Cu) (tedit 5F95EA78)
    (at 139.7 88.646)
    (fp_text reference U1 (at 0 0.0762) (layer F.SilkS) hide)
    (fp_text value "MOUDLE-BLUETOOTH-AUDIO-BC127(51P-18X11.8MM)" (at 5.225887 3.096137) (layer F.Fab))
    (pad 1 smd rect (at -5.8 -8.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 2 smd rect (at -5.8 -7.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 3 smd rect (at -5.8 -6.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 4 smd rect (at -5.8 -5.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 5 smd rect (at -5.8 -4.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 21 "Net-(U1-Pad5)"))
    (pad 6 smd rect (at -5.8 -4.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 22 "Net-(U1-Pad6)"))
    (pad 7 smd rect (at -5.8 -3.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 23 "Net-(U1-Pad7)"))
    (pad 8 smd rect (at -5.8 -2.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 24 "Net-(U1-Pad8)"))
    (pad 9 smd rect (at -5.8 -1.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 25 "Net-(U1-Pad9)"))
    (pad 10 smd rect (at -5.8 -0.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 26 "Net-(U1-Pad10)"))
    (pad 11 smd rect (at -5.8 -0.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 12 smd rect (at -5.8 0.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 27 "Net-(U1-Pad12)"))
    (pad 13 smd rect (at -5.8 1.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 SPKR-LN))
    (pad 14 smd rect (at -5.8 2.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 SPKR-LP))
    (pad 15 smd rect (at -5.8 3.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 SPKR-RN))
    (pad 16 smd rect (at -5.8 3.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 SPKR-RP))
    (pad 17 smd rect (at -5.8 4.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 28 "Net-(U1-Pad17)"))
    (pad 18 smd rect (at -5.8 5.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 29 "Net-(U1-Pad18)"))
    (pad 19 smd rect (at -5.8 6.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 30 "Net-(U1-Pad19)"))
    (pad 20 smd rect (at -5.8 7.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 31 "Net-(U1-Pad20)"))
    (pad 21 smd rect (at -5.8 7.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 32 "Net-(U1-Pad21)"))
    (pad 22 smd rect (at -4.8 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 35 smd rect (at 5.8 7.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 33 "Net-(U1-Pad35)"))
    (pad 23 smd rect (at -4 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 34 "Net-(U1-Pad23)"))
    (pad 24 smd rect (at -3.2 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 35 "Net-(U1-Pad24)"))
    (pad 25 smd rect (at -2.4 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 36 "Net-(U1-Pad25)"))
    (pad 26 smd rect (at -1.6 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 37 "Net-(U1-Pad26)"))
    (pad 27 smd rect (at -0.8 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 10 GND))
    (pad 28 smd rect (at 0 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 5 VREGEN))
    (pad 29 smd rect (at 0.8 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 38 "Net-(U1-Pad29)"))
    (pad 30 smd rect (at 1.6 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 39 "Net-(U1-Pad30)"))
    (pad 31 smd rect (at 2.4 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 40 "Net-(U1-Pad31)"))
    (pad 32 smd rect (at 3.2 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 4 3.3v+))
    (pad 33 smd rect (at 4 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 4 3.3v+))
    (pad 34 smd rect (at 4.8 9) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 4 3.3v+))
    (pad 36 smd rect (at 5.8 7.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 41 "Net-(U1-Pad36)"))
    (pad 37 smd rect (at 5.8 6.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 LED0))
    (pad 38 smd rect (at 5.8 5.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 LED1))
    (pad 39 smd rect (at 5.8 4.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 LED2))
    (pad 40 smd rect (at 5.8 3.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 UART_CTS))
    (pad 41 smd rect (at 5.8 3.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 UART_TX))
    (pad 42 smd rect (at 5.8 2.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 13 UART_RX))
    (pad 43 smd rect (at 5.8 1.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 14 UART_RTS-DTR))
    (pad 44 smd rect (at 5.8 0.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 15 RESET_ActiveHi))
    (pad 45 smd rect (at 5.8 -0.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 16 SPI-PCM_SELECT))
    (pad 46 smd rect (at 5.8 -0.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 17 I2S_SYNC))
    (pad 47 smd rect (at 5.8 -1.7) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 18 I2S_DCLK))
    (pad 48 smd rect (at 5.8 -2.5) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 19 I2S_DOUT))
    (pad 49 smd rect (at 5.8 -3.3) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 20 I2S_DIN))
    (pad 50 smd rect (at 5.8 -4.1) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 42 "Net-(U1-Pad50)"))
    (pad 51 smd rect (at 5.8 -4.9) (size 1 0.6) (layers F.Cu F.Paste F.Mask)
      (net 43 "Net-(U1-Pad51)"))
  )
  (gr_text BC127 (at 139.7 87.4395) (layer F.SilkS))
  (gr_text "BC127\nBLE AUDIO\nCHIP" (at 139.7 86.0425 90) (layer B.SilkS))
  (gr_text "SPI\nPCM" (at 145.0975 97.2185) (layer B.SilkS))
  (gr_text "UART\nCTS" (at 143.129 97.2185) (layer B.SilkS))
  (gr_text "UART\nDTR" (at 140.6525 97.2185) (layer B.SilkS))
  (gr_text LED0 (at 138.3665 97.536) (layer B.SilkS))
  (gr_text LED1 (at 136.2075 97.536) (layer B.SilkS))
  (gr_text LED2 (at 134.1755 97.536) (layer B.SilkS))
  (gr_text I2S.DOUT (at 144.145 81.28) (layer B.SilkS))
  (gr_text I2S.DIN (at 144.5895 83.8835) (layer B.SilkS))
  (gr_text I2S.CLK (at 144.653 86.487) (layer B.SilkS))
  (gr_text I2S.SYNC (at 144.3355 89.027) (layer B.SilkS))
  (gr_text RESET (at 144.78 91.5035) (layer B.SilkS))
  (gr_text RX (at 145.161 93.9165) (layer B.SilkS))
  (gr_text TX (at 145.161 95.4405) (layer B.SilkS))
  (gr_text 3.3v (at 134.4295 95.758) (layer B.SilkS))
  (gr_text VREG.EN (at 135.001 93.7895) (layer B.SilkS))
  (gr_text SPK.RP (at 134.874 91.5035) (layer B.SilkS))
  (gr_text SPK.RN (at 135.001 88.9635) (layer B.SilkS))
  (gr_text SPK.LP (at 134.6835 86.36) (layer B.SilkS))
  (gr_text SPK.LN (at 134.874 83.82) (layer B.SilkS))
  (gr_text GND (at 134.9375 81.407) (layer B.SilkS))
  (gr_line (start 130.556 99.568) (end 130.556 80.772) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 147.32 101.092) (end 132.08 101.092) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 148.844 99.568) (end 148.844 80.772) (layer Edge.Cuts) (width 0.05))
  (gr_line (start 147.828 79.756) (end 131.572 79.756) (layer Edge.Cuts) (width 0.05))
  (gr_arc (start 131.572 80.772) (end 131.572 79.756) (angle -90) (layer Edge.Cuts) (width 0.05))
  (gr_arc (start 147.828 80.772) (end 148.844 80.772) (angle -90) (layer Edge.Cuts) (width 0.05))
  (gr_arc (start 132.08 99.568) (end 130.556 99.568) (angle -90) (layer Edge.Cuts) (width 0.05))
  (gr_arc (start 147.32 99.568) (end 147.32 101.092) (angle -90) (layer Edge.Cuts) (width 0.05))
  (zone (net 0) (net_name "") (layers F.Cu In1.Cu In2.Cu B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (keepout (tracks not_allowed) (vias not_allowed) (copperpour not_allowed))
    (fill (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 146.1135 83.6295) (xy 134.874 83.6295) (xy 134.874 79.756) (xy 146.1135 79.6925)
      )
    )
  )
  (zone (net 4) (net_name 3.3v+) (layer F.Cu) (hatch edge 0.508)
    (connect_pads yes (clearance 0.2))
    (min_thickness 0.2)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 148.082 100.33) (xy 131.318 100.33) (xy 131.318 80.01) (xy 148.082 80.01)
      )
    )
  )
  (zone (net 10) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads yes (clearance 0.2))
    (min_thickness 0.2)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 148.082 100.33) (xy 131.318 100.33) (xy 131.318 80.01) (xy 148.082 80.01)
      )
    )
  )
  (zone (net 4) (net_name 3.3v+) (layer In1.Cu) (hatch edge 0.508)
    (connect_pads yes (clearance 0.2))
    (min_thickness 0.2)
    (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 148.082 100.33) (xy 131.318 100.33) (xy 131.318 80.01) (xy 148.082 80.01)
      )
    )
  )
)
