(kicad_pcb (version 20221018) (generator pcbnew)
  (general
    (thickness 1.6)
  )
  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
    (32 "B.Adhes" user "B.Adhesive")
    (33 "F.Adhes" user "F.Adhesive")
    (34 "B.Paste" user)
    (35 "F.Paste" user)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Dwgs.User" user "User.Drawings")
    (41 "Cmts.User" user "User.Comments")
    (42 "Eco1.User" user "User.Eco1")
    (43 "Eco2.User" user "User.Eco2")
    (44 "Edge.Cuts" user)
    (45 "Margin" user)
    (46 "B.CrtYd" user "B.Courtyard")
    (47 "F.CrtYd" user "F.Courtyard")
    (48 "B.Fab" user)
    (49 "F.Fab" user)
    (50 "User.1" user)
    (51 "User.2" user)
    (52 "User.3" user)
    (53 "User.4" user)
    (54 "User.5" user)
    (55 "User.6" user)
    (56 "User.7" user)
    (57 "User.8" user)
    (58 "User.9" user)
  )
  (setup
    (stackup
      (layer "F.SilkS" (type "Top Silk Screen"))
      (layer "F.Paste" (type "Top Solder Paste"))
      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
      (layer "F.Cu" (type "copper") (thickness 0.035))
      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
      (layer "B.Cu" (type "copper") (thickness 0.035))
      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
      (layer "B.Paste" (type "Bottom Solder Paste"))
      (layer "B.SilkS" (type "Bottom Silk Screen"))
      (copper_finish "None")
      (dielectric_constraints no)
    )
    (pad_to_mask_clearance 0)
    (pcbplotparams
      (layerselection 0x00010fc_ffffffff)
      (plot_on_all_layers_selection 0x0000000_00000000)
      (disableapertmacros false)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (dashed_line_dash_ratio 12.000000)
      (dashed_line_gap_ratio 3.000000)
      (svgprecision 4)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (dxfpolygonmode true)
      (dxfimperialunits true)
      (dxfusepcbnewfont true)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (sketchpadsonfab false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory "")
    )
  )
  (net 0 "")
  (net 1 "Net-(D1-K)")
  (net 2 "GND")
  (net 3 "Net-(J1-In)")
  (footprint "digikey-footprints:Term_Block_1x2_P5.08MM" (layer "F.Cu")
    (at 109.198 86.36)
    (descr "http://www.on-shore.com/wp-content/uploads/2015/09/osttcxx2162.pdf")
    (property "Category" "Connectors, Interconnects")
    (property "DK_Datasheet_Link" "http://www.on-shore.com/wp-content/uploads/OSTTCXX2162.pdf")
    (property "DK_Detail_Page" "/product-detail/en/on-shore-technology-inc/OSTTC022162/ED2609-ND/614558")
    (property "Description" "TERM BLK 2P SIDE ENT 5.08MM PCB")
    (property "Digi-Key_PN" "ED2609-ND")
    (property "Family" "Terminal Blocks - Wire to Board")
    (property "MPN" "OSTTC022162")
    (property "Manufacturer" "On Shore Technology Inc.")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "Status" "Active")
    (property "ki_description" "TERM BLK 2P SIDE ENT 5.08MM PCB")
    (property "ki_keywords" "ED2609-ND OSTTC")
    (attr through_hole)
    (fp_text reference "J2" (at 2.794 -4.826) (layer "F.SilkS") hide)
    (fp_text value "OSTTC022162" (at 2.032 5.09) (layer "F.Fab"))
    (pad "1" thru_hole rect (at 0 0) (size 2.2 2.2) (drill 1.3) (layers "*.Cu" "*.Mask")
      (net 1 "Net-(D1-K)") (pintype "passive"))
    (pad "2" thru_hole circle (at 5.08 0) (size 2.3 2.3) (drill 1.3) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pintype "passive"))
  )
  (footprint "my library:BNC_amphenol_TH" (layer "F.Cu")
    (at 110.45 129.025 180)
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, LEMO, ...)")
    (property "ki_keywords" "BNC SMA SMB SMC LEMO coaxial connector CINCH RCA")
    (attr through_hole)
    (fp_text reference "J1" (at 5.165 18.09 unlocked) (layer "F.SilkS"))
    (fp_text value "Conn_Coaxial" (at 7.62 7.62 90 unlocked) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at -11.43 2.5 180 unlocked) (layer "F.Fab"))
    (pad "1" thru_hole circle (at -1.27 13.97 180) (size 1.8 1.8) (drill 0.9) (layers "*.Cu" "*.Mask")
      (net 3 "Net-(J1-In)") (pinfunction "In") (pintype "passive"))
    (pad "2" thru_hole circle (at -6.35 8.89 180) (size 4 4) (drill 2) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pinfunction "Ext") (pintype "passive"))
    (pad "2" thru_hole circle (at -3.81 13.97 180) (size 1.8 1.8) (drill 0.9) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pinfunction "Ext") (pintype "passive"))
    (pad "2" thru_hole circle (at 3.81 8.89 180) (size 4 4) (drill 2) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pinfunction "Ext") (pintype "passive"))
  )
  (footprint "Capacitor_THT:C_Disc_D4.3mm_W1.9mm_P5.00mm" (layer "F.Cu")
    (at 110.53 106.68)
    (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.3*1.9mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
    (tags "C Disc series Radial pin pitch 5.00mm  diameter 4.3mm width 1.9mm Capacitor")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "Unpolarized capacitor, small symbol")
    (property "ki_keywords" "capacitor cap")
    (attr through_hole)
    (fp_text reference "C1" (at 2.5 -2.2) (layer "F.SilkS"))
    (fp_text value "0.1u" (at 2.5 2.2) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 2.5 0) (layer "F.Fab"))
    (pad "1" thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 1 "Net-(D1-K)") (pintype "passive"))
    (pad "2" thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pintype "passive"))
    (model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/C_Disc_D4.3mm_W1.9mm_P5.00mm.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (footprint "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal" (layer "F.Cu")
    (at 107.95 95.25)
    (descr "Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf")
    (tags "Diode DO-35_SOD27 series Axial Horizontal pin pitch 7.62mm  length 4mm diameter 2mm")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "Zener diode")
    (property "ki_keywords" "diode")
    (attr through_hole)
    (fp_text reference "D1" (at 3.81 -2.12) (layer "F.SilkS"))
    (fp_text value "D_Zener" (at 3.81 2.12) (layer "F.Fab"))
    (fp_text user "K" (at 0 -1.8) (layer "F.SilkS") hide)
    (fp_text user "K" (at 0 -1.8) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 4.11 0) (layer "F.Fab"))
    (pad "1" thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 1 "Net-(D1-K)") (pinfunction "K") (pintype "passive"))
    (pad "2" thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pinfunction "A") (pintype "passive"))
    (model "${KICAD6_3DMODEL_DIR}/Diode_THT.3dshapes/D_DO-35_SOD27_P7.62mm_Horizontal.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (footprint "my library:DIN_Rail_adapter" locked (layer "F.Cu")
    (at 126.91 86.814)
    (attr through_hole)
    (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide)
    (fp_text value "DIN_Rail_adapter" (at 0 36.83 unlocked) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 0.09 6.35) (layer "F.Fab") hide)
    (fp_text user "${REFERENCE}" (at 0 1.27 unlocked) (layer "F.Fab"))
    (pad "" np_thru_hole circle locked (at 0 18.85) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
    (pad "" np_thru_hole circle locked (at 0.09 6.35) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
    (pad "" np_thru_hole circle locked (at 0.09 31.55) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
  )
  (footprint "TestPoint:TestPoint_THTPad_2.5x2.5mm_Drill1.2mm" (layer "F.Cu")
    (at 104.14 95.25)
    (descr "THT rectangular pad as test Point, square 2.5mm side length, hole diameter 1.2mm")
    (tags "test point THT pad rectangle square")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "test point")
    (property "ki_keywords" "test point tp")
    (attr exclude_from_pos_files)
    (fp_text reference "SIG" (at 0 -2.148) (layer "F.SilkS") hide)
    (fp_text value "TestPoint" (at 0 2.25) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 0 -2.15) (layer "F.Fab"))
    (pad "1" thru_hole rect (at 0 0) (size 2.5 2.5) (drill 1.2) (layers "*.Cu" "*.Mask")
      (net 1 "Net-(D1-K)") (pinfunction "1") (pintype "passive"))
  )
  (footprint "my library:DIN_Rail_adapter" locked (layer "F.Cu")
    (at 96.52 86.814)
    (attr through_hole)
    (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide)
    (fp_text value "DIN_Rail_adapter" (at 0 36.83 unlocked) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 0.09 6.35) (layer "F.Fab") hide)
    (fp_text user "${REFERENCE}" (at 0 1.27 unlocked) (layer "F.Fab"))
    (pad "" np_thru_hole circle locked (at 0 18.85) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
    (pad "" np_thru_hole circle locked (at 0.09 6.35) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
    (pad "" np_thru_hole circle locked (at 0.09 31.55) (size 2.2 2.2) (drill 2.2) (layers "*.Cu" "*.Mask"))
  )
  (footprint "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal" (layer "F.Cu")
    (at 107.95 101.6)
    (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
    (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "Resistor")
    (property "ki_keywords" "R res resistor")
    (attr through_hole)
    (fp_text reference "R1" (at 3.81 -2.37) (layer "F.SilkS"))
    (fp_text value "10k" (at 3.81 2.37) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 3.81 0) (layer "F.Fab"))
    (pad "1" thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 3 "Net-(J1-In)") (pintype "passive"))
    (pad "2" thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask")
      (net 1 "Net-(D1-K)") (pintype "passive"))
    (model "${KICAD6_3DMODEL_DIR}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (footprint "TestPoint:TestPoint_THTPad_2.5x2.5mm_Drill1.2mm" (layer "F.Cu")
    (at 119.38 95.25)
    (descr "THT rectangular pad as test Point, square 2.5mm side length, hole diameter 1.2mm")
    (tags "test point THT pad rectangle square")
    (property "Sheetfile" "110_BNC_DIN_adpater.kicad_sch")
    (property "Sheetname" "")
    (property "ki_description" "test point")
    (property "ki_keywords" "test point tp")
    (attr exclude_from_pos_files)
    (fp_text reference "GND" (at 0 -2.148) (layer "F.SilkS") hide)
    (fp_text value "GND" (at 0 2.25) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 0 -2.15) (layer "F.Fab"))
    (pad "1" thru_hole rect (at 0 0) (size 2.5 2.5) (drill 1.2) (layers "*.Cu" "*.Mask")
      (net 2 "GND") (pinfunction "1") (pintype "passive"))
  )
  (gr_rect (start 90.932 81.788) (end 132.588 128.27)
    (fill none) (layer "Edge.Cuts"))
  (gr_text "+" (at 103.575 86.85) (layer "F.SilkS"))
  (gr_text "0V" (at 118.65 86.65) (layer "F.SilkS"))
  (zone (net 2) (net_name "GND") (layers "F&B.Cu") (hatch edge 0.5)
    (connect_pads (clearance 0.5))
    (min_thickness 0.25) (filled_areas_thickness no)
    (fill yes (thermal_gap 0.5) (thermal_bridge_width 0.5))
    (polygon
      (pts
        (xy 86.36 76.2)
        (xy 137.16 76.2)
        (xy 137.16 132.08)
        (xy 86.36 132.08)
      )
    )
  )
)
