(kicad_pcb (version 4) (host pcbnew 4.0.7)
  (general
    (links 16)
    (no_connects 0)
    (area 142.164999 93.904999 157.555001 115.165)
    (thickness 1.6)
    (drawings 11)
    (tracks 66)
    (zones 0)
    (modules 4)
    (nets 15)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 +5V)
  (net 2 GND)
  (net 3 /A_OUT)
  (net 4 /A_IN2)
  (net 5 /B_IN1)
  (net 6 /A_IN1)
  (net 7 /B_OUT)
  (net 8 /B_IN2)
  (net 9 /D_IN2)
  (net 10 /C_OUT)
  (net 11 /C_IN2)
  (net 12 /D_OUT)
  (net 13 /D_IN1)
  (net 14 /C_IN1)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +5V)
    (add_net /A_IN1)
    (add_net /A_IN2)
    (add_net /A_OUT)
    (add_net /B_IN1)
    (add_net /B_IN2)
    (add_net /B_OUT)
    (add_net /C_IN1)
    (add_net /C_IN2)
    (add_net /C_OUT)
    (add_net /D_IN1)
    (add_net /D_IN2)
    (add_net /D_OUT)
    (add_net GND)
  )
  (module Capacitors_SMD:C_0805_HandSoldering (layer F.Cu) (tedit 59E8A2D8)
    (at 149.86 97.79 180)
    (descr "Capacitor SMD 0805, hand soldering")
    (tags "capacitor 0805")
    (attr smd)
    (fp_text reference C1 (at 0 1.27 180) (layer F.SilkS))
    (fp_text value C (at 0 1.75 180) (layer F.Fab))
    (fp_text user %R (at 0 -1.75 180) (layer F.Fab))
    (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (model Capacitors_SMD.3dshapes/C_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x07_Pitch2.54mm_SMD_Pin1Left (layer B.Cu) (tedit 59E8A37C)
    (at 146.05 104.14 180)
    (descr "surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left)")
    (tags "Surface mounted pin header SMD 1x07 2.54mm single row style1 pin1 left")
    (attr smd)
    (fp_text reference J1 (at 0 7.62 180) (layer B.SilkS))
    (fp_text value Conn_LT (at 0 -9.95 180) (layer B.Fab))
    (fp_text user %R (at 0 0 450) (layer B.Fab))
    (pad 1 smd rect (at -1.655 7.62 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 3 /A_OUT))
    (pad 3 smd rect (at -1.655 2.54 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 4 /A_IN2))
    (pad 5 smd rect (at -1.655 -2.54 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 5 /B_IN1))
    (pad 7 smd rect (at -1.655 -7.62 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 2 GND))
    (pad 2 smd rect (at 1.655 5.08 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 6 /A_IN1))
    (pad 4 smd rect (at 1.655 0 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 7 /B_OUT))
    (pad 6 smd rect (at 1.655 -5.08 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 8 /B_IN2))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x07_Pitch2.54mm_SMD_Pin1Left.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Pin_Headers:Pin_Header_Straight_1x07_Pitch2.54mm_SMD_Pin1Left (layer B.Cu) (tedit 59E8A37A)
    (at 153.67 104.14 180)
    (descr "surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left)")
    (tags "Surface mounted pin header SMD 1x07 2.54mm single row style1 pin1 left")
    (attr smd)
    (fp_text reference J2 (at 0 7.62 180) (layer B.SilkS))
    (fp_text value Conn_RT (at 0 -9.95 180) (layer B.Fab))
    (fp_text user %R (at 0 0 450) (layer B.Fab))
    (pad 1 smd rect (at -1.655 7.62 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 1 +5V))
    (pad 3 smd rect (at -1.655 2.54 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 9 /D_IN2))
    (pad 5 smd rect (at -1.655 -2.54 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 10 /C_OUT))
    (pad 7 smd rect (at -1.655 -7.62 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 11 /C_IN2))
    (pad 2 smd rect (at 1.655 5.08 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 12 /D_OUT))
    (pad 4 smd rect (at 1.655 0 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 13 /D_IN1))
    (pad 6 smd rect (at 1.655 -5.08 180) (size 2.51 1) (layers B.Cu B.Paste B.Mask)
      (net 14 /C_IN1))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x07_Pitch2.54mm_SMD_Pin1Left.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (module Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm (layer F.Cu) (tedit 59E8A2CE)
    (at 149.86 104.14)
    (descr "14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SOIC 1.27")
    (attr smd)
    (fp_text reference U1 (at 0 5.08) (layer F.SilkS))
    (fp_text value 74LS38 (at 0 5.375) (layer F.Fab))
    (fp_text user %R (at 0 0) (layer F.Fab))
    (pad 1 smd rect (at -2.7 -3.81) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 /A_IN1))
    (pad 2 smd rect (at -2.7 -2.54) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 4 /A_IN2))
    (pad 3 smd rect (at -2.7 -1.27) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 /A_OUT))
    (pad 4 smd rect (at -2.7 0) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 /B_IN1))
    (pad 5 smd rect (at -2.7 1.27) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 8 /B_IN2))
    (pad 6 smd rect (at -2.7 2.54) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 7 /B_OUT))
    (pad 7 smd rect (at -2.7 3.81) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 2 GND))
    (pad 8 smd rect (at 2.7 3.81) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 10 /C_OUT))
    (pad 9 smd rect (at 2.7 2.54) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 14 /C_IN1))
    (pad 10 smd rect (at 2.7 1.27) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 11 /C_IN2))
    (pad 11 smd rect (at 2.7 0) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 12 /D_OUT))
    (pad 12 smd rect (at 2.7 -1.27) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 13 /D_IN1))
    (pad 13 smd rect (at 2.7 -2.54) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 9 /D_IN2))
    (pad 14 smd rect (at 2.7 -3.81) (size 1.5 0.6) (layers F.Cu F.Paste F.Mask)
      (net 1 +5V))
    (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-14_3.9x8.7mm_Pitch1.27mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_text "TO 'LS01" (at 144.78 104.14 270) (layer F.SilkS))
  (gr_text 'LS00/'LS38 (at 154.94 104.14 270) (layer F.SilkS))
  (gr_text "©2017 NGFW" (at 149.86 113.03) (layer F.Cu))
  (gr_line (start 157.48 95.25) (end 157.48 113.03) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 143.51 93.98) (end 156.21 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 142.24 113.03) (end 142.24 95.25) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 156.21 114.3) (end 143.51 114.3) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 156.21 113.03) (end 157.48 113.03) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 143.51 113.03) (end 143.51 114.3) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 143.51 95.25) (end 142.24 95.25) (angle 90) (layer Edge.Cuts) (width 0.15))
  (gr_arc (start 156.21 95.25) (end 156.21 93.98) (angle 90) (layer Edge.Cuts) (width 0.15))
  (zone (net 2) (net_name GND) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 156.21 95.25) (xy 157.48 95.25) (xy 157.48 113.03) (xy 156.21 113.03) (xy 156.21 114.3)
        (xy 143.51 114.3) (xy 143.51 113.03) (xy 142.24 113.03) (xy 142.24 95.25) (xy 143.51 95.25)
        (xy 143.51 93.98) (xy 156.21 93.98)
      )
    )
  )
  (zone (net 2) (net_name GND) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.508))
    (min_thickness 0.254)
    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 156.21 95.25) (xy 157.48 95.25) (xy 157.48 113.03) (xy 156.21 113.03) (xy 156.21 114.3)
        (xy 143.51 114.3) (xy 143.51 113.03) (xy 142.24 113.03) (xy 142.24 95.25) (xy 143.51 95.25)
        (xy 143.51 93.98) (xy 156.21 93.98)
      )
    )
  )
)
