Design Rule Verification Report

Date:		10/13/2023
Time:		2:18:15 PM
Elapsed Time:		00:00:02
Filename:		C:\Users\Public\Documents\Altium\LSM6DSV_LPS22DF.v02a\LSM6DSV_LPS22DF.v02a.PcbDoc

Warnings:		0
Rule Violations:		0

Summary

Warnings	Count
Total	0

Rule Violations	Count
Clearance Constraint (Gap=6mil) (All),(All)	0
Clearance Constraint (Gap=10mil) (InPolygon),(All)	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Un-Routed Net Constraint ( (All) )	0
Modified Polygon (Allow modified: No), (Allow shelved: No)	0
Width Constraint (Min=9mil) (Max=30mil) (Preferred=20mil) (InNet('GND'))	0
Width Constraint (Min=20mil) (Max=40mil) (Preferred=30mil) (InNetClass('Power'))	0
Width Constraint (Min=10mil) (Max=30mil) (Preferred=20mil) (InNetClass('3V3'))	0
Width Constraint (Min=6mil) (Max=400mil) (Preferred=8mil) (All)	0
Power Plane Connect Rule(Relief Connect )(Expansion=4mil) (Conductor Width=6mil) (Air Gap=6mil) (Entries=4) (All)	0
Minimum Annular Ring (Minimum=4mil) (All)	0
Hole Size Constraint (Min=10mil) (Max=265mil) (All)	0
Hole To Hole Clearance (Gap=10mil) (All),(All)	0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All)	0
Silk To Solder Mask (Clearance=5mil) (IsPad),(All)	0
Silk to Silk (Clearance=0mil) (All),(All)	0
Net Antennae (Tolerance=0mil) (All)	0
Board Clearance Constraint (Gap=0mil) (All)	0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)	0
Total	0