(kicad_pcb (version 20171130) (host pcbnew 5.1.2-f72e74a~84~ubuntu18.04.1)
  (general
    (thickness 1.6)
    (drawings 5)
    (tracks 19)
    (zones 0)
    (modules 4)
    (nets 4)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.1524)
    (user_trace_width 0.1524)
    (user_trace_width 0.2)
    (user_trace_width 0.3)
    (user_trace_width 0.4)
    (user_trace_width 0.6)
    (user_trace_width 1)
    (user_trace_width 1.5)
    (user_trace_width 2)
    (trace_clearance 0.1524)
    (zone_clearance 0.3)
    (zone_45_only no)
    (trace_min 0.1524)
    (via_size 0.381)
    (via_drill 0.254)
    (via_min_size 0.381)
    (via_min_drill 0.254)
    (user_via 0.4 0.254)
    (user_via 0.6 0.4)
    (user_via 0.8 0.6)
    (user_via 1 0.8)
    (user_via 1.3 1)
    (user_via 1.5 1.2)
    (user_via 1.7 1.4)
    (user_via 1.9 1.6)
    (uvia_size 0.381)
    (uvia_drill 0.254)
    (uvias_allowed no)
    (uvia_min_size 0.381)
    (uvia_min_drill 0.254)
    (edge_width 0.15)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 0.6 1)
    (pad_drill 0)
    (pad_to_mask_clearance 0.1)
    (solder_mask_min_width 0.1)
    (pad_to_paste_clearance_ratio -0.15)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions true)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "OSH_Park_2_layer_plots"))
  )
  (net 0 "")
  (net 1 /PIN_3)
  (net 2 /PIN_2)
  (net 3 /PIN_1)
  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.1524)
    (via_dia 0.381)
    (via_drill 0.254)
    (uvia_dia 0.381)
    (uvia_drill 0.254)
    (add_net /PIN_1)
    (add_net /PIN_2)
    (add_net /PIN_3)
  )
  (module SquantorIC:SOT23-3-Microchip-CB (layer F.Cu) (tedit 5D189B83)
    (at 152 84.9)
    (descr "SOT23 3 pin, Microchip name CB")
    (tags "SOT23 3pin Microchip CB")
    (fp_text reference U1 (at 0 -2.9) (layer F.SilkS))
    (fp_text value Generic_SOT23-3 (at 0 2.8) (layer F.Fab) hide)
    (pad 3 smd rect (at 0 -1.35) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 1 /PIN_3) (zone_connect 2))
    (pad 2 smd rect (at 0.95 1.35) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 2 /PIN_2))
    (pad 1 smd rect (at -0.95 1.35) (size 0.6 1) (layers F.Cu F.Paste F.Mask)
      (net 3 /PIN_1))
  )
  (module SquantorConnectors:Header-0254-1X03-H010 (layer F.Cu) (tedit 5BE2003D)
    (at 151.7 90)
    (descr "PIN HEADER")
    (tags "PIN HEADER")
    (attr virtual)
    (fp_text reference J1 (at 0 -2) (layer F.SilkS))
    (fp_text value PINS_1X03 (at 0 2.1) (layer F.Fab) hide)
    (pad 3 thru_hole circle (at 2.54 0 180) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 1 /PIN_3))
    (pad 2 thru_hole circle (at 0 0 180) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 2 /PIN_2))
    (pad 1 thru_hole rect (at -2.54 0 180) (size 1.3 1.3) (drill 1) (layers *.Cu *.Mask)
      (net 3 /PIN_1))
  )
  (module Symbols:OSHW-Symbol_6.7x6mm_SilkScreen (layer B.Cu) (tedit 0)
    (at 152 84.6 180)
    (descr "Open Source Hardware Symbol")
    (tags "Logo Symbol OSHW")
    (attr virtual)
    (fp_text reference N1 (at 0 0) (layer B.SilkS) hide)
    (fp_text value OHWLOGO (at 0.75 0) (layer B.Fab) hide)
  )
  (module SquantorLabels:Label_version (layer B.Cu) (tedit 5B5A1E49)
    (at 152 88.2)
    (fp_text reference N2 (at 0 -1.4) (layer B.Fab) hide)
    (fp_text value 20190630 (at -0.4 0.1) (layer B.SilkS))
    (fp_text user V: (at 2.3 0.1) (layer B.SilkS))
  )
  (gr_line (start 147.6 81.2) (end 147.6 91.6) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 155.8 81.2) (end 147.6 81.2) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 155.8 91.6) (end 155.8 81.2) (layer Edge.Cuts) (width 0.15))
  (gr_line (start 147.6 91.6) (end 155.8 91.6) (layer Edge.Cuts) (width 0.15))
  (zone (net 1) (net_name /PIN_3) (layer B.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.3))
    (min_thickness 0.2)
    (fill yes (arc_segments 32) (thermal_gap 0.3) (thermal_bridge_width 0.5))
    (polygon
      (pts
        (xy 147.6 81.2) (xy 155.8 81.2) (xy 155.8 88.7) (xy 147.6 88.7)
      )
    )
  )
  (zone (net 1) (net_name /PIN_3) (layer F.Cu) (hatch edge 0.508)
    (connect_pads (clearance 0.3))
    (min_thickness 0.2)
    (fill yes (arc_segments 32) (thermal_gap 0.3) (thermal_bridge_width 0.5))
    (polygon
      (pts
        (xy 147.6 81.2) (xy 155.8 81.2) (xy 155.8 88.7) (xy 147.6 88.7)
      )
    )
  )
)
